mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 23:33:00 +00:00
ac47bd230c
The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet. - Remove CONFIG_RESET_PHY_R symbol from all board files - Use uclass mvgbe to bring up the network. And remove ad-hoc code. - Enable CONFIG_PHY_MARVELL to properly configure the network. - Miscellaneous changes: Move constants to .c file and remove header file board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments. Signed-off-by: Tony Dinh <mibodhi@gmail.com>
111 lines
2.1 KiB
C
111 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
|
|
* (C) Copyright 2009
|
|
* Marvell Semiconductor <www.marvell.com>
|
|
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <init.h>
|
|
#include <netdev.h>
|
|
#include <asm/global_data.h>
|
|
#include <asm/mach-types.h>
|
|
#include <asm/arch/cpu.h>
|
|
#include <asm/arch/soc.h>
|
|
#include <asm/arch/mpp.h>
|
|
#include <linux/bitops.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
#define SHEEVAPLUG_OE_LOW (~(0))
|
|
#define SHEEVAPLUG_OE_HIGH (~(0))
|
|
#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */
|
|
#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
|
|
|
|
int board_early_init_f(void)
|
|
{
|
|
/*
|
|
* default gpio configuration
|
|
* There are maximum 64 gpios controlled through 2 sets of registers
|
|
* the below configuration configures mainly initial LED status
|
|
*/
|
|
mvebu_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
|
|
SHEEVAPLUG_OE_VAL_HIGH,
|
|
SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
|
|
|
|
/* Multi-Purpose Pins Functionality configuration */
|
|
static const u32 kwmpp_config[] = {
|
|
MPP0_NF_IO2,
|
|
MPP1_NF_IO3,
|
|
MPP2_NF_IO4,
|
|
MPP3_NF_IO5,
|
|
MPP4_NF_IO6,
|
|
MPP5_NF_IO7,
|
|
MPP6_SYSRST_OUTn,
|
|
MPP7_GPO,
|
|
MPP8_UART0_RTS,
|
|
MPP9_UART0_CTS,
|
|
MPP10_UART0_TXD,
|
|
MPP11_UART0_RXD,
|
|
MPP12_SD_CLK,
|
|
MPP13_SD_CMD,
|
|
MPP14_SD_D0,
|
|
MPP15_SD_D1,
|
|
MPP16_SD_D2,
|
|
MPP17_SD_D3,
|
|
MPP18_NF_IO0,
|
|
MPP19_NF_IO1,
|
|
MPP20_GPIO,
|
|
MPP21_GPIO,
|
|
MPP22_GPIO,
|
|
MPP23_GPIO,
|
|
MPP24_GPIO,
|
|
MPP25_GPIO,
|
|
MPP26_GPIO,
|
|
MPP27_GPIO,
|
|
MPP28_GPIO,
|
|
MPP29_TSMP9,
|
|
MPP30_GPIO,
|
|
MPP31_GPIO,
|
|
MPP32_GPIO,
|
|
MPP33_GPIO,
|
|
MPP34_GPIO,
|
|
MPP35_GPIO,
|
|
MPP36_GPIO,
|
|
MPP37_GPIO,
|
|
MPP38_GPIO,
|
|
MPP39_GPIO,
|
|
MPP40_GPIO,
|
|
MPP41_GPIO,
|
|
MPP42_GPIO,
|
|
MPP43_GPIO,
|
|
MPP44_GPIO,
|
|
MPP45_GPIO,
|
|
MPP46_GPIO,
|
|
MPP47_GPIO,
|
|
MPP48_GPIO,
|
|
MPP49_GPIO,
|
|
0
|
|
};
|
|
kirkwood_mpp_conf(kwmpp_config, NULL);
|
|
return 0;
|
|
}
|
|
|
|
int board_eth_init(struct bd_info *bis)
|
|
{
|
|
return cpu_eth_init(bis);
|
|
}
|
|
|
|
int board_init(void)
|
|
{
|
|
/*
|
|
* arch number of board
|
|
*/
|
|
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
|
|
|
|
/* address of boot parameters */
|
|
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
|
|
|
|
return 0;
|
|
}
|