u-boot/arch/arm/cpu/armv7/exynos
Ajay Kumar 6102560891 Exynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels
The existing setting for rpll_sdiv generates 70.5Mhz RPLL
video clock to drive 1366x768 panel on peach_pit.

This clock rate is not sufficient to drive 1920x1080 panel on peach-pi.
So, we adjust rpll_sdiv to 3 so that it generates 141Mhz pixel clock
which can drive peach-pi LCD.

This change doesn't break peach-pit LCD since 141/2=70.5Mhz, i.e FIMD
divider at IP level will get set to 1(the required divider setting
will be calculated and set by exynos_fimd_set_clock()) and hence
peach-pit LCD still works fine.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
..
clock.c arm: exynos: add display clocks for Exynos5800 2015-04-06 14:34:40 +09:00
clock_init.h arm: exynos: Add RPLL for Exynos5420 2014-09-05 20:37:07 +09:00
clock_init_exynos4.c remove unnecessary version.h includes 2015-03-24 10:50:50 -04:00
clock_init_exynos5.c Exynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels 2015-04-06 14:34:40 +09:00
common_setup.h Exynos: Fix L2 cache timings on Exynos5420 and Exynos5800 2015-02-28 18:03:46 +09:00
config.mk arm: put .hash, .got.plt and .machine_param back in binaries 2014-01-14 11:43:10 +01:00
dmc_common.c Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init 2014-06-13 17:05:13 +09:00
dmc_init_ddr3.c Exynos5: ddr3: Choose between single or double channel config 2014-11-17 19:03:38 +09:00
dmc_init_exynos4.c EXYNOS: Move files from board/samsung to arch/arm 2013-07-05 17:06:55 +09:00
exynos4_setup.h remove unnecessary version.h includes 2015-03-24 10:50:50 -04:00
exynos5_setup.h Exynos542x: CPU: Power down all secondary cores 2015-02-28 18:03:46 +09:00
Kconfig malloc_f: enable SYS_MALLOC_F by default if DM is on 2015-03-28 09:03:09 -04:00
lowlevel_init.c Exynos: Fix L2 cache timings on Exynos5420 and Exynos5800 2015-02-28 18:03:46 +09:00
Makefile Exynos542x: Add workaround for exynos iROM errata 2015-02-28 18:03:46 +09:00
pinmux.c exynos5: pinmux: check flag for i2c config 2015-01-29 17:10:00 -07:00
power.c EXYNOS5: Add function to enable exynos5420 usbdev phy ctrl 2015-02-13 17:19:55 +09:00
sec_boot.S Exynos542x: Add workaround for exynos iROM errata 2015-02-28 18:03:46 +09:00
soc.c Exynos: Fix L2 cache timings on Exynos5420 and Exynos5800 2015-02-28 18:03:46 +09:00
spl_boot.c arm: Allow lr to be saved by board code 2015-02-16 20:14:54 +01:00
system.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
tzpc.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00