mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-03 18:10:13 +00:00
cf77093e31
Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal may be used to control some power-rails on the carrier board, therefore it should be set to high when the module is booting. To do this as early as possible is generally a good idea and the issue was noticed on the Yavia carrier board where it is needed to power the I2C EEPROM on the carrier board. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
141 lines
1.7 KiB
Text
141 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/*
|
|
* Copyright 2020-2022 Toradex
|
|
*/
|
|
|
|
#include "imx8mm-u-boot.dtsi"
|
|
|
|
/ {
|
|
firmware {
|
|
optee {
|
|
compatible = "linaro,optee-tz";
|
|
method = "smc";
|
|
};
|
|
};
|
|
|
|
wdt-reboot {
|
|
compatible = "wdt-reboot";
|
|
bootph-pre-ram;
|
|
wdt = <&wdog1>;
|
|
};
|
|
};
|
|
|
|
&{/aliases} {
|
|
eeprom0 = &eeprom_module;
|
|
eeprom1 = &eeprom_carrier_board;
|
|
eeprom2 = &eeprom_display_adapter;
|
|
};
|
|
|
|
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&binman_uboot {
|
|
offset = <0x5fc00>;
|
|
};
|
|
|
|
&gpio1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&gpio2 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&gpio3 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&gpio4 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&gpio5 {
|
|
bootph-pre-ram;
|
|
|
|
ctrl-sleep-moci-hog {
|
|
bootph-pre-ram;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
bootph-pre-ram;
|
|
|
|
eeprom_module: eeprom@50 {
|
|
compatible = "i2c-eeprom";
|
|
pagesize = <16>;
|
|
reg = <0x50>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c4 {
|
|
/* EEPROM on display adapter (MIPI DSI Display Adapter) */
|
|
eeprom_display_adapter: eeprom@50 {
|
|
compatible = "i2c-eeprom";
|
|
pagesize = <16>;
|
|
reg = <0x50>;
|
|
};
|
|
|
|
/* EEPROM on carrier board */
|
|
eeprom_carrier_board: eeprom@57 {
|
|
compatible = "i2c-eeprom";
|
|
pagesize = <16>;
|
|
reg = <0x57>;
|
|
};
|
|
};
|
|
|
|
&pinctrl_ctrl_sleep_moci {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_i2c1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_pmic {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_uart1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_usdhc1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_usdhc2 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&pinctrl_wdog {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&uart1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&usdhc1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&usdhc2 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&usdhc3 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&wdog1 {
|
|
bootph-pre-ram;
|
|
};
|