mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-16 16:23:14 +00:00
739ba41d5a
The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
35 lines
782 B
C
35 lines
782 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2012-2014 Panasonic Corporation
|
|
* Copyright (C) 2015-2016 Socionext Inc.
|
|
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <linux/io.h>
|
|
#include <asm/secure.h>
|
|
|
|
#include "sc-regs.h"
|
|
|
|
/* If PSCI is enabled, this is used for SYSTEM_RESET function */
|
|
#ifdef CONFIG_ARMV7_PSCI
|
|
#define __SECURE __secure
|
|
#else
|
|
#define __SECURE
|
|
#endif
|
|
|
|
void __SECURE reset_cpu(unsigned long ignored)
|
|
{
|
|
u32 tmp;
|
|
|
|
writel(5, sc_base + SC_IRQTIMSET); /* default value */
|
|
|
|
tmp = readl(sc_base + SC_SLFRSTSEL);
|
|
tmp &= ~0x3; /* mask [1:0] */
|
|
tmp |= 0x0; /* XRST reboot */
|
|
writel(tmp, sc_base + SC_SLFRSTSEL);
|
|
|
|
tmp = readl(sc_base + SC_SLFRSTCTL);
|
|
tmp |= 0x1;
|
|
writel(tmp, sc_base + SC_SLFRSTCTL);
|
|
}
|