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a6d7e8c914
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to
control the enabling of SiFive CLINT support in both SPL (M-mode)
and U-Boot proper (S-mode). So for a typical SPL config that the
SiFive CLINT driver is enabled in both SPL and U-Boot proper, that
means the S-mode U-Boot tries to access the memory-mapped CLINT
registers directly, instead of the normal 'rdtime' instruction.
This was not a problem before, as the hardware does not forbid the
access from S-mode. However this becomes an issue now with OpenSBI
commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain")
that the SiFive CLINT register space is protected by PMP for M-mode
access only. U-Boot proper does not boot any more with the latest
OpenSBI, that access exceptions are fired forever from U-Boot when
trying to read the timer value via the SiFive CLINT driver in U-Boot.
To solve this, we need to split current SiFive CLINT support between
SPL and U-Boot proper, using 2 separate Kconfig options.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
27 lines
1.1 KiB
Makefile
27 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
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obj-y += timer-uclass.o
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obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
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obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
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obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o
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obj-$(CONFIG_ARC_TIMER) += arc_timer.o
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obj-$(CONFIG_AST_TIMER) += ast_timer.o
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obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
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obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
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obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
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obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
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obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
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obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o
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obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
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obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
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obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
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obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
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obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
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obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint_timer.o
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obj-$(CONFIG_STI_TIMER) += sti-timer.o
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obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
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obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
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obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
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obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o
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