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312011e8e7
The ethernet PHY must be reset on AV96, however DWMAC currently does not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC PHY reset property is going away on next DT sync. Add PHY specific reset bindings to trigger the PHY reset and fix sporadic ethernet malfunctions, until the next DT sync. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> |
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| .. | ||
| cpu | ||
| dts | ||
| include | ||
| lib | ||
| mach-apple | ||
| mach-aspeed | ||
| mach-at91 | ||
| mach-bcm283x | ||
| mach-bcmstb | ||
| mach-cortina | ||
| mach-davinci | ||
| mach-exynos | ||
| mach-highbank | ||
| mach-imx | ||
| mach-integrator | ||
| mach-ipq40xx | ||
| mach-k3 | ||
| mach-keystone | ||
| mach-kirkwood | ||
| mach-lpc32xx | ||
| mach-mediatek | ||
| mach-meson | ||
| mach-mvebu | ||
| mach-nexell | ||
| mach-octeontx | ||
| mach-octeontx2 | ||
| mach-omap2 | ||
| mach-orion5x | ||
| mach-owl | ||
| mach-qemu | ||
| mach-rmobile | ||
| mach-rockchip | ||
| mach-s5pc1xx | ||
| mach-snapdragon | ||
| mach-socfpga | ||
| mach-sti | ||
| mach-stm32 | ||
| mach-stm32mp | ||
| mach-sunxi | ||
| mach-tegra | ||
| mach-u8500 | ||
| mach-uniphier | ||
| mach-versal | ||
| mach-versatile | ||
| mach-zynq | ||
| mach-zynqmp | ||
| mach-zynqmp-r5 | ||
| thumb1/include/asm/proc-armv | ||
| config.mk | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||