mirror of
https://github.com/AsahiLinux/u-boot
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620ca1c174
Currently we have the following on boot: CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 DRAM: 128 MiB MMC: MXS MMC: 0 Video: MXSFB: 'videomode' variable not set!In: serial Break the line of the warning message in order to have a better reading format. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
194 lines
5.1 KiB
C
194 lines
5.1 KiB
C
/*
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* Freescale i.MX23/i.MX28 LCDIF driver
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*
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* Copyright (C) 2011-2013 Marek Vasut <marex@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <video_fb.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include "videomodes.h"
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#define PS2KHZ(ps) (1000000000UL / (ps))
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static GraphicDevice panel;
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/*
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* DENX M28EVK:
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* setenv videomode
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* video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066,
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* le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296,vmode:0
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*
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* Freescale mx23evk/mx28evk with a Seiko 4.3'' WVGA panel:
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* setenv videomode
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* video=ctfb:x:800,y:480,depth:24,mode:0,pclk:29851,
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* le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0
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*/
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static void mxs_lcd_init(GraphicDevice *panel,
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struct ctfb_res_modes *mode, int bpp)
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{
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struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
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uint32_t word_len = 0, bus_width = 0;
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uint8_t valid_data = 0;
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/* Kick in the LCDIF clock */
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mxs_set_lcdclk(PS2KHZ(mode->pixclock));
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/* Restart the LCDIF block */
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mxs_reset_block(®s->hw_lcdif_ctrl_reg);
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switch (bpp) {
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case 24:
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word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
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bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT;
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valid_data = 0x7;
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break;
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case 18:
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word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
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bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT;
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valid_data = 0x7;
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break;
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case 16:
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word_len = LCDIF_CTRL_WORD_LENGTH_16BIT;
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bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT;
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valid_data = 0xf;
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break;
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case 8:
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word_len = LCDIF_CTRL_WORD_LENGTH_8BIT;
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bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT;
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valid_data = 0xf;
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break;
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}
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writel(bus_width | word_len | LCDIF_CTRL_DOTCLK_MODE |
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LCDIF_CTRL_BYPASS_COUNT | LCDIF_CTRL_LCDIF_MASTER,
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®s->hw_lcdif_ctrl);
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writel(valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
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®s->hw_lcdif_ctrl1);
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writel((mode->yres << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | mode->xres,
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®s->hw_lcdif_transfer_count);
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writel(LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
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LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
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LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
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mode->vsync_len, ®s->hw_lcdif_vdctrl0);
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writel(mode->upper_margin + mode->lower_margin +
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mode->vsync_len + mode->yres,
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®s->hw_lcdif_vdctrl1);
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writel((mode->hsync_len << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET) |
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(mode->left_margin + mode->right_margin +
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mode->hsync_len + mode->xres),
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®s->hw_lcdif_vdctrl2);
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writel(((mode->left_margin + mode->hsync_len) <<
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LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET) |
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(mode->upper_margin + mode->vsync_len),
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®s->hw_lcdif_vdctrl3);
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writel((0 << LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET) | mode->xres,
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®s->hw_lcdif_vdctrl4);
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writel(panel->frameAdrs, ®s->hw_lcdif_cur_buf);
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writel(panel->frameAdrs, ®s->hw_lcdif_next_buf);
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/* Flush FIFO first */
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writel(LCDIF_CTRL1_FIFO_CLEAR, ®s->hw_lcdif_ctrl1_set);
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/* Sync signals ON */
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setbits_le32(®s->hw_lcdif_vdctrl4, LCDIF_VDCTRL4_SYNC_SIGNALS_ON);
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/* FIFO cleared */
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writel(LCDIF_CTRL1_FIFO_CLEAR, ®s->hw_lcdif_ctrl1_clr);
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/* RUN! */
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writel(LCDIF_CTRL_RUN, ®s->hw_lcdif_ctrl_set);
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}
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void *video_hw_init(void)
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{
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int bpp = -1;
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char *penv;
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void *fb;
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struct ctfb_res_modes mode;
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puts("Video: ");
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/* Suck display configuration from "videomode" variable */
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penv = getenv("videomode");
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if (!penv) {
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puts("MXSFB: 'videomode' variable not set!\n");
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return NULL;
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}
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bpp = video_get_params(&mode, penv);
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/* fill in Graphic device struct */
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sprintf(panel.modeIdent, "%dx%dx%d",
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mode.xres, mode.yres, bpp);
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panel.winSizeX = mode.xres;
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panel.winSizeY = mode.yres;
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panel.plnSizeX = mode.xres;
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panel.plnSizeY = mode.yres;
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switch (bpp) {
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case 24:
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case 18:
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panel.gdfBytesPP = 4;
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panel.gdfIndex = GDF_32BIT_X888RGB;
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break;
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case 16:
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panel.gdfBytesPP = 2;
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panel.gdfIndex = GDF_16BIT_565RGB;
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break;
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case 8:
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panel.gdfBytesPP = 1;
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panel.gdfIndex = GDF__8BIT_INDEX;
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break;
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default:
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printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp);
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return NULL;
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}
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panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
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/* Allocate framebuffer */
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fb = malloc(panel.memSize);
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if (!fb) {
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printf("MXSFB: Error allocating framebuffer!\n");
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return NULL;
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}
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/* Wipe framebuffer */
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memset(fb, 0, panel.memSize);
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panel.frameAdrs = (u32)fb;
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printf("%s\n", panel.modeIdent);
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/* Start framebuffer */
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mxs_lcd_init(&panel, &mode, bpp);
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return (void *)&panel;
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}
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