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If the bus is blocked because of a previously interrupted transfer, up to eleven clocks are generated on the I2CSCL line to complete the transfer and to free the bus. With this fix pin I2CSCL (PG6) is really configured as GPIO so the clock pulses are really generated. Patch by Martin Krause, 04 Apr 2006 |
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at91rm9200 | ||
imx | ||
ks8695 | ||
s3c24x0 | ||
config.mk | ||
cpu.c | ||
interrupts.c | ||
Makefile | ||
start.S |