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u-boot/board/xilinx/zynq
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T Karthik Reddy b80a476faa fpga: zynqpl: Add zynq aes load & loadp commands 
Added support for zynq aes load & loadp commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
..
zynq-cc108 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-dlc20-rev1.0 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-microzed arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc702 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc706 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc770-xm010 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc770-xm011 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc770-xm011-x16 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc770-xm012 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zc770-xm013 arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zed arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zturn arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zybo arm: zynq: Remove low level UART setting 2020-01-14 09:05:53 +01:00
zynq-zybo-z7 arm: zynq: zybo z7: fix MIO init issue 2020-02-28 12:04:10 +01:00
.gitignore ARM: zynq: add default ps7_init_gpl.c/h for Zed, MicroZed, ZC70x 2015-05-25 10:52:36 +02:00
board.c xilinx: Introduce board_late_init_xilinx() 2020-04-27 13:57:17 +02:00
bootimg.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
cmds.c fpga: zynqpl: Add zynq aes load & loadp commands 2020-06-24 13:07:58 +02:00
Kconfig xilinx: zynq: Add support to secure images 2018-07-19 10:49:54 +02:00
MAINTAINERS ARM: zynq: Rename defconfig to be align with ZynqMP and Versal 2020-02-28 12:15:11 +01:00
Makefile arm: xilinx: Fill DEVICE_TREE directly in Makefiles 2020-02-28 12:15:11 +01:00
xil_io.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
zynq-cse-nand ARM: zynq: Wire SPL configuration for cse nor/nand targets 2018-11-29 10:31:02 +01:00
zynq-cse-nor ARM: zynq: Wire SPL configuration for cse nor/nand targets 2018-11-29 10:31:02 +01:00
zynq-cse-qspi-single arm: zynq: Add mini u-boot configuration for zynq 2017-11-28 16:08:47 +01:00