mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 15:23:07 +00:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
125 lines
2.8 KiB
C
125 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <errno.h>
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#include <smsc_sio1007.h>
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static inline u8 sio1007_read(int port, int reg)
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{
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outb(reg, port);
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return inb(port + 1);
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}
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static inline void sio1007_write(int port, int reg, int val)
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{
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outb(reg, port);
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outb(val, port + 1);
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}
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static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
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{
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sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
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}
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void sio1007_enable_serial(int port, int num, int iobase, int irq)
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{
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if (num < 0 || num > SIO1007_UART_NUM)
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return;
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/* enter configuration state */
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outb(0x55, port);
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/* power on serial port and set up its i/o base & irq */
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if (!num) {
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sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART1_POWER_ON);
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sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2);
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sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
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} else {
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sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART2_POWER_ON);
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sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2);
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sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
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}
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/* exit configuration state */
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outb(0xaa, port);
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}
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void sio1007_enable_runtime(int port, int iobase)
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{
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/* enter configuration state */
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outb(0x55, port);
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/* set i/o base for the runtime register block */
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sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
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sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
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/* turn on address decoding for this block */
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sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
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/* exit configuration state */
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outb(0xaa, port);
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}
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void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
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{
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int reg = GPIO0_DIR;
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if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
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return;
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if (gpio >= GPIO_NUM_PER_GROUP) {
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reg = GPIO1_DIR;
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gpio -= GPIO_NUM_PER_GROUP;
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}
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/* enter configuration state */
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outb(0x55, port);
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/* set gpio pin direction, polority and type */
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sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
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sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);
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sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio);
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/* exit configuration state */
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outb(0xaa, port);
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}
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int sio1007_gpio_get_value(int port, int gpio)
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{
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int reg = GPIO0_DATA;
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int val;
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if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
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return -EINVAL;
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if (gpio >= GPIO_NUM_PER_GROUP) {
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reg = GPIO1_DATA;
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gpio -= GPIO_NUM_PER_GROUP;
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}
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val = inb(port + reg);
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if (val & (1 << gpio))
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return 1;
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else
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return 0;
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}
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void sio1007_gpio_set_value(int port, int gpio, int val)
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{
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int reg = GPIO0_DATA;
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u8 data;
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if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
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return;
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if (gpio >= GPIO_NUM_PER_GROUP) {
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reg = GPIO1_DATA;
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gpio -= GPIO_NUM_PER_GROUP;
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}
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data = inb(port + reg);
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data &= ~(1 << gpio);
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data |= (val << gpio);
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outb(data, port + reg);
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}
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