mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 14:40:41 +00:00
3cbec0ad09
We don't have both sram and sdram in TPL, so update from: arch/arm/cpu/armv8/u-boot-spl.lds Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
94 lines
1.7 KiB
Text
94 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019
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* Rockchip Electronics Co., Ltd
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* Kever Yang<kever.yang@rock-chips.com>
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*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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* Aneesh V <aneesh@ti.com>
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*/
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OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
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OUTPUT_ARCH(aarch64)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x00000000;
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.text : {
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. = ALIGN(8);
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*(.__image_copy_start)
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CPUDIR/start.o (.text*)
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*(.text*)
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}
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.rodata : {
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. = ALIGN(8);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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}
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.data : {
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. = ALIGN(8);
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*(.data*)
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}
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.u_boot_list : {
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. = ALIGN(8);
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KEEP(*(SORT(.u_boot_list*)));
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}
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.image_copy_end : {
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. = ALIGN(8);
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*(.__image_copy_end)
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}
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.end : {
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. = ALIGN(8);
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*(.__end)
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}
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_image_binary_end = .;
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.bss_start (NOLOAD) : {
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. = ALIGN(8);
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KEEP(*(.__bss_start));
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}
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.bss (NOLOAD) : {
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*(.bss*)
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. = ALIGN(8);
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}
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.bss_end (NOLOAD) : {
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KEEP(*(.__bss_end));
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}
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/DISCARD/ : { *(.dynsym) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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}
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#if defined(CONFIG_TPL_MAX_SIZE)
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ASSERT(__image_copy_end - __image_copy_start < (CONFIG_TPL_MAX_SIZE), \
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"TPL image too big");
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#endif
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#if defined(CONFIG_TPL_BSS_MAX_SIZE)
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ASSERT(__bss_end - __bss_start < (CONFIG_TPL_BSS_MAX_SIZE), \
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"TPL image BSS too big");
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#endif
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#if defined(CONFIG_TPL_MAX_FOOTPRINT)
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ASSERT(__bss_end - _start < (CONFIG_TPL_MAX_FOOTPRINT), \
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"TPL image plus BSS too big");
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#endif
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