mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-27 23:21:01 +00:00
54841ab50c
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
216 lines
4.8 KiB
C
216 lines
4.8 KiB
C
/*
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* (C) Copyright 2007-2010 DENX Software Engineering
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* Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code for the MPC512x family.
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*
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* Derived from the MPC83xx code.
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*/
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#include <common.h>
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#include <command.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <fdt_support.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu (void)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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ulong clock = gd->cpu_clk;
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u32 pvr = get_pvr ();
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u32 spridr = in_be32(&immr->sysconf.spridr);
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char buf1[32], buf2[32];
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puts ("CPU: ");
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switch (spridr & 0xffff0000) {
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case SPR_5121E:
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puts ("MPC5121e ");
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break;
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default:
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printf ("Unknown part ID %08x ", spridr & 0xffff0000);
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}
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printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr));
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switch (pvr & 0xffff0000) {
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case PVR_E300C4:
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puts ("e300c4 ");
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break;
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default:
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puts ("unknown ");
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}
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printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n",
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strmhz(buf1, clock),
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strmhz(buf2, gd->csb_clk),
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gd->reset_status & 0xffff);
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return 0;
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}
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int
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do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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ulong msr;
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr &= ~( MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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/*
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* Enable Reset Control Reg - "RSTE" is the magic word that let us go
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*/
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out_be32(&immap->reset.rpr, 0x52535445);
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/* Verify Reset Control Reg is enabled */
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while (!(in_be32(&immap->reset.rcer) & RCER_CRE))
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;
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printf ("Resetting the board.\n");
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udelay(200);
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/* Perform reset */
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out_be32(&immap->reset.rcr, RCR_SWHR);
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/* Unreached... */
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return 1;
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}
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/*
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* Get timebase clock frequency (like cpu_clk in Hz)
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*/
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unsigned long get_tbclk (void)
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{
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ulong tbclk;
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tbclk = (gd->bus_clk + 3L) / 4L;
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return tbclk;
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}
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#if defined(CONFIG_WATCHDOG)
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void watchdog_reset (void)
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{
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int re_enable = disable_interrupts ();
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/* Reset watchdog */
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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out_be32(&immr->wdt.swsrr, 0x556c);
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out_be32(&immr->wdt.swsrr, 0xaa39);
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if (re_enable)
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enable_interrupts ();
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}
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#endif
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#ifdef CONFIG_OF_LIBFDT
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#ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
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/*
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* fdt setup for old device trees
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* fix up
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* cpu clocks
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* soc clocks
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* ethernet addresses
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*/
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static void old_ft_cpu_setup(void *blob, bd_t *bd)
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{
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/*
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* avoid fixing up by path because that
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* produces scary error messages
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*/
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uchar enetaddr[6];
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/*
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* old device trees have ethernet nodes with
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* device_type = "network"
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*/
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eth_getenv_enetaddr("ethaddr", enetaddr);
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do_fixup_by_prop(blob, "device_type", "network", 8,
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"local-mac-address", enetaddr, 6, 0);
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do_fixup_by_prop(blob, "device_type", "network", 8,
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"address", enetaddr, 6, 0);
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/*
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* old device trees have soc nodes with
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* device_type = "soc"
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*/
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do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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"bus-frequency", bd->bi_ipsfreq, 0);
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}
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#endif
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static void ft_clock_setup(void *blob, bd_t *bd)
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{
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char *cpu_path = "/cpus/" OF_CPU;
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/*
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* fixup cpu clocks using path
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*/
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do_fixup_by_path_u32(blob, cpu_path,
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"timebase-frequency", OF_TBCLK, 1);
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do_fixup_by_path_u32(blob, cpu_path,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_path_u32(blob, cpu_path,
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"clock-frequency", bd->bi_intfreq, 1);
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/*
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* fixup soc clocks using compatible
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*/
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do_fixup_by_compat_u32(blob, OF_SOC_COMPAT,
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"bus-frequency", bd->bi_ipsfreq, 1);
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}
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
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old_ft_cpu_setup(blob, bd);
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#endif
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ft_clock_setup(blob, bd);
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#ifdef CONFIG_HAS_ETH0
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fdt_fixup_ethernet(blob);
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#endif
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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}
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#endif
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#ifdef CONFIG_MPC512x_FEC
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/* Default initializations for FEC controllers. To override,
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* create a board-specific function called:
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* int board_eth_init(bd_t *bis)
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*/
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int cpu_eth_init(bd_t *bis)
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{
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return mpc512x_fec_initialize(bis);
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}
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#endif
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