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2e53759dc6
some dpmacs in armv8a based freescale layerscape SOCs can be configured via both serdes(sgmii, xfi, xlaui etc) bits and via EC*_PMUX(rgmii) bits in RCW. e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits Now if a dpmac is enabled by serdes bits then it takes precedence over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII, then the dpmac is SGMII and not RGMII. Therefore, move the fsl_rgmii_init after fsl_serdes_init. in fsl_rgmii_init function of SOC, we will check if the dpmac is enabled or not? if it is (fsl_serdes_init has already enabled the dpmac), then don't enable it. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
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.. | ||
fsl-layerscape | ||
hisilicon | ||
s32v234 | ||
cache.S | ||
cache_v8.c | ||
config.mk | ||
cpu-dt.c | ||
cpu.c | ||
exception_level.c | ||
exceptions.S | ||
fwcall.c | ||
generic_timer.c | ||
Kconfig | ||
linux-kernel-image-header-vars.h | ||
lowlevel_init.S | ||
Makefile | ||
psci.S | ||
sec_firmware.c | ||
sec_firmware_asm.S | ||
smccc-call.S | ||
spin_table.c | ||
spin_table_v8.S | ||
start.S | ||
tlb.S | ||
transition.S | ||
u-boot-spl.lds | ||
u-boot.lds |