mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 00:47:26 +00:00
9924d44dbc
Enable MISC_INIT_R for ae350 to support CPU name detection and re-sync the configs via make savedefconfig. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
60 lines
1.5 KiB
Text
60 lines
1.5 KiB
Text
CONFIG_RISCV=y
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CONFIG_TEXT_BASE=0x01800000
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CONFIG_SYS_MALLOC_LEN=0x80000
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000
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CONFIG_ENV_SECT_SIZE=0x1000
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CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
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CONFIG_SPL=y
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CONFIG_SYS_LOAD_ADDR=0x100000
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CONFIG_TARGET_ANDES_AE350=y
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CONFIG_ARCH_RV64I=y
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CONFIG_RISCV_SMODE=y
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# CONFIG_AVAILABLE_HARTS is not set
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CONFIG_SYS_MONITOR_BASE=0x88000000
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
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CONFIG_SYS_BOOTM_LEN=0x4000000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_PBSIZE=1050
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CONFIG_DISPLAY_CPUINFO=y
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CONFIG_DISPLAY_BOARDINFO=y
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_MISC_INIT_R=y
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CONFIG_SPL_MAX_SIZE=0x100000
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CONFIG_SPL_BSS_START_ADDR=0x400000
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_CACHE=y
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CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
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CONFIG_SYS_PROMPT="RISC-V # "
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF_TEST=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_BOOTP_PREFER_SERVERIP=y
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CONFIG_CMD_CACHE=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_NET_RETRY_COUNT=50
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_MMC=y
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CONFIG_FTSDC010=y
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CONFIG_FTSDC010_SDIO=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
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CONFIG_FLASH_SHOW_PROGRESS=0
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CONFIG_SYS_CFI_FLASH_STATUS_POLL=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_FTMAC100=y
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CONFIG_BAUDRATE=38400
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_ATCSPI200_SPI=y
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# CONFIG_BINMAN_FDT is not set
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