mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-15 07:43:07 +00:00
984639039f
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
45 lines
813 B
ArmAsm
45 lines
813 B
ArmAsm
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
|
|
/*
|
|
* Copyright (c) 2018 Microsemi Corporation
|
|
*/
|
|
|
|
#include <asm/asm.h>
|
|
#include <asm/regdef.h>
|
|
|
|
.set noreorder
|
|
.extern vcoreiii_tlb_init
|
|
.extern vcoreiii_ddr_init
|
|
#ifdef CONFIG_SOC_LUTON
|
|
.extern pll_init
|
|
#endif
|
|
|
|
LEAF(lowlevel_init)
|
|
/*
|
|
* As we have no stack yet, we can assume the restricted
|
|
* luxury of the sX-registers without saving them
|
|
*/
|
|
|
|
/* Modify ra/s0 such we return to physical NOR location */
|
|
li t0, 0x0fffffff
|
|
li t1, CONFIG_TEXT_BASE
|
|
and s0, ra, t0
|
|
add s0, s0, t1
|
|
|
|
jal vcoreiii_tlb_init
|
|
nop
|
|
|
|
#ifdef CONFIG_SOC_LUTON
|
|
jal pll_init
|
|
nop
|
|
#endif
|
|
|
|
/* Initialize DDR controller to enable stack/gd/heap */
|
|
0:
|
|
jal vcoreiii_ddr_init
|
|
nop
|
|
bnez v0, 0b /* Retry on error */
|
|
nop
|
|
|
|
jr s0
|
|
nop
|
|
END(lowlevel_init)
|