u-boot/arch/mips/cpu
Paul Burton 31d36f748c MIPS: Hang if run on a secondary CPU
Some systems are configured such that multiple CPUs begin running from
their reset vector following a system reset. If this occurs then U-Boot
will be run on multiple CPUs simultaneously, which causes all sorts of
issues as the multiple instances of U-Boot clobber each other.

Prevent this from happening by simply hanging with an infinite loop if
we run on a CPU whose ID, as determined by GlobalNumber or EBase.CPUNum
as appropriate, is non-zero.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-21 17:04:53 +02:00
..
mips32 MIPS: unify CPU code in arch/mips/cpu/ 2015-01-30 14:19:58 +01:00
mips64 MIPS: unify CPU code in arch/mips/cpu/ 2015-01-30 14:19:58 +01:00
cm_init.S MIPS: Map CM Global Control Registers 2016-09-21 15:04:04 +02:00
cpu.c MIPS: Probe cache line sizes once during boot 2016-09-21 15:04:04 +02:00
interrupts.c MIPS: unify CPU code in arch/mips/cpu/ 2015-01-30 14:19:58 +01:00
Makefile MIPS: Map CM Global Control Registers 2016-09-21 15:04:04 +02:00
start.S MIPS: Hang if run on a secondary CPU 2016-09-21 17:04:53 +02:00
time.c MIPS: unify CPU code in arch/mips/cpu/ 2015-01-30 14:19:58 +01:00
u-boot-spl.lds MIPS: provide a default u-boot-spl.lds 2016-05-31 09:38:11 +02:00
u-boot.lds MIPS: Fix cache maintenance in relocate_code & simplify 2016-09-21 16:25:43 +02:00