Jeroen Hofstee 878cae6b02 ARM: emif4: wait for CM_DLL_READYST to be set ... The code intends for the CM_DLL_READYST to be set, but actually polls till any bit is set since the logical AND is used instead of the bitwise one is used. Fix it. cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>		2014-07-07 19:42:33 -04:00
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board.c	am33xx/omap: Allow cache enable for all Sitara/OMAP	2014-06-11 16:25:39 -04:00
clock.c	arm:am33xx: Add a scale_vcores() hook	2014-06-06 17:46:16 -04:00
clock_am33xx.c	ARM: AM43xx: clocks: Update DPLL details	2013-12-18 21:14:01 -05:00
clock_am43xx.c	ARM: AM43xx: Fix UART clocks enabling	2014-06-06 17:46:15 -04:00
clock_ti814x.c	ti814x: Fix illegal use of FP ops in clock_ti814x.c	2014-02-21 14:03:44 -05:00
clock_ti816x.c	Add TI816X support	2013-08-15 18:38:37 -04:00
config.mk	kbuild: use shorten logs for mkimage rules	2014-02-25 11:01:29 -05:00
ddr.c	cpu: armv7: am33x: ddr: write emif ref_ctrl_shadow register	2014-06-19 17:53:58 -04:00
emif4.c	ARM: emif4: wait for CM_DLL_READYST to be set	2014-07-07 19:42:33 -04:00
Makefile	ARM: omap: merge GPMC initialization code for all platform	2014-05-23 19:39:36 -04:00
mux.c	am33xx: move generic parts of pinmux handling out from board/ti/am335x	2012-10-25 11:31:37 -07:00
sys_info.c	am33xx: report silicon revision instead of code	2014-05-23 19:40:39 -04:00
u-boot-spl.lds	arm: make _end compiler-generated	2014-02-26 21:18:09 +01:00