mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 08:01:08 +00:00
d0399a46e7
Synchronise device trees with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
368 lines
8.6 KiB
Text
368 lines
8.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015-2021 DH electronics GmbH
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* Copyright (C) 2018 Marek Vasut <marex@denx.de>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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chosen {
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stdout-path = "serial0:115200n8";
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};
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clk_ext_audio_codec: clock-codec {
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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compatible = "fixed-clock";
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};
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display_bl: display-bl {
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brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
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compatible = "pwm-backlight";
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default-brightness-level = <8>;
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enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
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pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
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status = "okay";
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};
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lcd_display: disp0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb24";
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pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
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pinctrl-names = "default";
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status = "okay";
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port@0 {
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reg = <0>;
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lcd_display_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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lcd_display_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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gpio-keys {
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#size-cells = <0>;
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compatible = "gpio-keys";
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button-0 {
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
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label = "TA1-GPIO-A";
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linux,code = <KEY_A>;
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pinctrl-0 = <&pinctrl_dhcom_a>;
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pinctrl-names = "default";
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wakeup-source;
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};
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button-1 {
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gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
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label = "TA2-GPIO-B";
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linux,code = <KEY_B>;
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pinctrl-0 = <&pinctrl_dhcom_b>;
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pinctrl-names = "default";
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wakeup-source;
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};
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button-2 {
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
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label = "TA3-GPIO-C";
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linux,code = <KEY_C>;
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pinctrl-0 = <&pinctrl_dhcom_c>;
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pinctrl-names = "default";
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wakeup-source;
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};
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button-3 {
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gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
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label = "TA4-GPIO-D";
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linux,code = <KEY_D>;
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pinctrl-0 = <&pinctrl_dhcom_d>;
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pinctrl-names = "default";
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wakeup-source;
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};
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};
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led {
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compatible = "gpio-leds";
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/*
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* Disable led-5, because GPIO E is
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* already used as touch interrupt.
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*/
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led-5 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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function = LED_FUNCTION_INDICATOR;
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gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
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pinctrl-0 = <&pinctrl_dhcom_e>;
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pinctrl-names = "default";
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status = "disabled";
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};
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led-6 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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function = LED_FUNCTION_INDICATOR;
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gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
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pinctrl-0 = <&pinctrl_dhcom_f>;
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pinctrl-names = "default";
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};
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led-7 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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function = LED_FUNCTION_INDICATOR;
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gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
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pinctrl-0 = <&pinctrl_dhcom_h>;
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pinctrl-names = "default";
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};
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led-8 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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function = LED_FUNCTION_INDICATOR;
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gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
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pinctrl-0 = <&pinctrl_dhcom_i>;
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pinctrl-names = "default";
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};
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};
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panel {
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backlight = <&display_bl>;
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compatible = "edt,etm0700g0edh6";
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcd_display_out>;
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};
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};
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};
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sound {
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audio-codec = <&sgtl5000>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT";
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compatible = "fsl,imx-audio-sgtl5000";
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model = "imx-sgtl5000";
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mux-ext-port = <3>;
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mux-int-port = <1>;
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ssi-controller = <&ssi1>;
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};
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};
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&audmux {
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pinctrl-0 = <&pinctrl_audmux_ext>;
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pinctrl-names = "default";
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&can2 {
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status = "disabled";
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};
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/* 1G ethernet */
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/delete-node/ ðphy0;
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&fec {
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phy-mode = "rgmii";
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phy-handle = <ðphy7>;
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pinctrl-0 = <&pinctrl_enet_1G>;
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pinctrl-names = "default";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy7: ethernet-phy@7 { /* KSZ 9021 */
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compatible = "ethernet-phy-ieee802.3-c22";
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interrupt-parent = <&gpio1>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&pinctrl_ethphy7>;
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pinctrl-names = "default";
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reg = <7>;
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
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rxc-skew-ps = <3000>;
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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rxdv-skew-ps = <0>;
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txc-skew-ps = <3000>;
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txd0-skew-ps = <0>;
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txd1-skew-ps = <0>;
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txd2-skew-ps = <0>;
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txd3-skew-ps = <0>;
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txen-skew-ps = <0>;
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};
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};
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c2 {
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sgtl5000: codec@a {
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#sound-dai-cells = <0>;
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clocks = <&clk_ext_audio_codec>;
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <&sw2_reg>;
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};
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touchscreen@38 {
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compatible = "edt,edt-ft5406";
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interrupt-parent = <&gpio4>;
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interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
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pinctrl-0 = <&pinctrl_dhcom_e>;
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pinctrl-names = "default";
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reg = <0x38>;
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};
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};
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&ipu1_di0_disp0 {
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remote-endpoint = <&lcd_display_in>;
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};
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&pcie {
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pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
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reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&usbh1 {
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disable-over-current;
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};
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&usdhc2 { /* SD card */
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status = "okay";
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};
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&iomuxc {
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pinctrl-0 = <
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/*
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* The following DHCOM GPIOs are used on this board.
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* Therefore, they have been removed from the list below.
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* A: key TA1
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* B: key TA2
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* C: key TA3
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* D: key TA4
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* E: touchscreen
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* F: led6
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* G: backlight enable
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* H: led7
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* I: led8
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* J: PCIe reset
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*/
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&pinctrl_hog_base
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&pinctrl_dhcom_k &pinctrl_dhcom_l
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&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
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&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
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&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
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&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
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>;
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pinctrl-names = "default";
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pinctrl_audmux_ext: audmux-ext-grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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>;
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};
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pinctrl_enet_1G: enet-1G-grp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
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>;
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};
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pinctrl_ethphy7: ethphy7-grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */
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MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */
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MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */
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>;
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};
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pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
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fsl,pins = <
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MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
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MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
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MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
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MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
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MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
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MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
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MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
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MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
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MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
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MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
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MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
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MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
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MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
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MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
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MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
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MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
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MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
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MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
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MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
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MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
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MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
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MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
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MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
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MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
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MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
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MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
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MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
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MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
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>;
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};
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};
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