mirror of
https://github.com/AsahiLinux/u-boot
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e379c03902
CPU: Freescale i.MX6DL rev1.1 at 792 MHz Board: aristaitenos I2C: ready DRAM: 1 GiB NAND: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB Display: lb07wv8 (800x480) - UART5 is console - MMC 0 and 1 - USB 0 and 1 - boot from mmc0 and spi nor flash - Splash screen support Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
325 lines
9.7 KiB
C
325 lines
9.7 KiB
C
/*
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* (C) Copyright 2014
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreSD board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ARISTAINETOS_CONFIG_H
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#define __ARISTAINETOS_CONFIG_H
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#define CONFIG_MX6
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#include "mx6_common.h"
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#include <linux/sizes.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_MACH_TYPE 4501
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#define CONFIG_MMCROOT "/dev/mmcblk0p2"
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#define CONFIG_DEFAULT_FDT_FILE "aristainetos.dtb"
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#define CONFIG_HOSTNAME aristainetos
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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#define CONFIG_SYS_GENERIC_BOARD
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART5_BASE
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#define CONFIG_CONSOLE_DEV "ttymxc4"
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#define CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_MTD
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 3
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#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 20)<<8))
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BMODE
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_SETEXPR
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"uimage=uImage\0" \
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"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"fdt_addr_r=0x11000000\0" \
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"kernel_addr_r=0x12000000\0" \
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"kernel_file=uImage\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"console=" CONFIG_CONSOLE_DEV "\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"mmcpart=1\0" \
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"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} " \
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"${uimage}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} " \
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"${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs;run loadimage loadfdt fdt_setup;" \
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"bootm ${kernel_addr_r} - ${fdt_addr_r};\0" \
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"rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-sato-sdk\0" \
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"nfsopts=nfsvers=3 nolock rw\0" \
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"netdev=eth0\0" \
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"fdt_setup=fdt addr ${fdt_addr_r};fdt resize;fdt chosen;fdt board\0"\
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"load_fdt=tftp ${fdt_addr_r} ${fdt_file}\0" \
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"load_kernel=tftp ${kernel_addr_r} ${kernel_file}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"get_env=mw ${loadaddr} 0x00000000 0x20000;" \
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"tftp ${loadaddr} /tftpboot/aristainetos/env.txt;" \
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"env import -t ${loadaddr}\0" \
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"addmisc=setenv bootargs ${bootargs} maxcpus=1 loglevel=8\0" \
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"bootargs_defaults=setenv bootargs ${console} ${mtdoops} " \
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"${optargs}\0" \
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"net_args=run bootargs_defaults;setenv bootargs ${bootargs} " \
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"root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"${hostname}:${netdev}:off\0" \
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"net_nfs=run load_kernel load_fdt;run net_args addmtd addmisc;" \
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"run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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"uboot=/tftpboot/aristainetos/u-boot.imx\0" \
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"load_uboot=tftp ${loadaddr} ${uboot}\0" \
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"uboot_sz=c0000\0" \
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"upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
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"mw.b 10200000 0x00 ${uboot_sz};" \
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"run load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
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"sf write ${loadaddr} 400 ${filesize};" \
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"sf read 10200000 400 ${uboot_sz};" \
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"cmp.b ${loadaddr} 10200000 bc000\0" \
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"ubi_prep=ubi part ubi 2048;ubifsmount ubi:kernel\0" \
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"load_kernel_ubi=ubifsload ${kernel_addr_r} uImage\0" \
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"load_fdt_ubi=ubifsload ${fdt_addr_r} aristainetos.dtb\0" \
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"ubi_nfs=run ubiprep load_kernel_ubi load_fdt_ubi;" \
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"run net_args addmtd addmisc;run fdt_setup;" \
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"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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"rootfsname=rootfs\0" \
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"ubi_args=run bootargs_defaults;setenv bootargs ${bootargs} " \
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"ubi.mtd=0,2048 root=ubi0:${rootfsname} rootfstype=ubifs " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
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"${hostname}:${netdev}:off\0" \
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"ubi_ubi=run ubi_prep load_kernel_ubi load_fdt_ubi;" \
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"run bootargs_defaults ubi_args addmtd addmisc;" \
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"run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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"ubirootfs_file=/tftpboot/aristainetos/rootfs-minimal.ubifs\0" \
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"upd_ubirootfs=run ubi_prep;tftp ${loadaddr} ${ubirootfs_file};" \
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"ubi write ${loadaddr} rootfs ${filesize}\0" \
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"ksz=800000\0" \
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"rootsz=2000000\0" \
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"usersz=8000000\0" \
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"ubi_make=run ubi_prep;ubi create kernel ${ksz};" \
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"ubi create rootfs ${rootsz};ubi create userfs ${usersz}\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"if mmc rescan; then " \
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"run mmcboot;" \
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"else run ubi_ubi; fi"
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_STACKSIZE (128 * 1024)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (12 * 1024)
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SECT_SIZE (0x010000)
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#define CONFIG_ENV_OFFSET (0x0c0000)
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#define CONFIG_ENV_OFFSET_REDUND (0x0d0000)
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_CACHE
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0x7f
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#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
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#define CONFIG_CMD_GPIO
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#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
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/* NAND stuff */
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* DMA stuff, needed for GPMI/MXS NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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/* RTC */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_RTC_BUS_NUM 2
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#define CONFIG_RTC_M41T11
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#define CONFIG_CMD_DATE
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_FAT
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
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#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31)
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/* UBI support */
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define MTDIDS_DEFAULT "nand0=gpmi-nand"
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#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:-(ubi)"
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#define CONFIG_MTD_UBI_FASTMAP
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#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_IMX_WATCHDOG
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#define CONFIG_FIT
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/* Framebuffer */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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/* check this console not needed, after test remove it */
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_IPUV3_CLK 198000000
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#define CONFIG_IMX_VIDEO_SKIP
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#define CONFIG_CMD_BMP
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#define CONFIG_PWM_IMX
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#define CONFIG_IMX6_PWM_PER_CLK 66000000
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#endif /* __ARISTAINETOS_CONFIG_H */
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