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6e7df1d151
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
318 lines
9.5 KiB
C
318 lines
9.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Generic ULPI interface.
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*
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* Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
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* Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
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*
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* Authors: Jana Rapava <fermata7@gmail.com>
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* Igor Grinberg <grinberg@compulab.co.il>
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*
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* Register offsets taken from:
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* linux/include/linux/usb/ulpi.h
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*
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* Original Copyrights follow:
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* Copyright (C) 2010 Nokia Corporation
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*/
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#ifndef __USB_ULPI_H__
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#define __USB_ULPI_H__
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#define ULPI_ERROR (1 << 8) /* overflow from any register value */
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#ifndef CFG_USB_ULPI_TIMEOUT
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#define CFG_USB_ULPI_TIMEOUT 1000 /* timeout in us */
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#endif
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/*
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* ulpi view port address and
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* Port_number that can be passed.
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* Any additional data to be passed can
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* be extended from this structure
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*/
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struct ulpi_viewport {
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uintptr_t viewport_addr;
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u32 port_num;
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};
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/*
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* Initialize the ULPI transciever and check the interface integrity.
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* @ulpi_vp - structure containing ULPI viewport data
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_init(struct ulpi_viewport *ulpi_vp);
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/*
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* Select transceiver speed.
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* @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
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* ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);
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/*
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* Enable/disable VBUS.
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* @ext_power - external VBUS supply is used (default is false)
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* @ext_indicator - external VBUS over-current indicator is used
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power);
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/*
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* Configure VBUS indicator
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* @external - external VBUS over-current indicator is used
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* @passthru - disables ANDing of internal VBUS comparator
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* with external VBUS input
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* @complement - inverts the external VBUS input
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*/
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int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external,
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int passthru, int complement);
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/*
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* Enable/disable pull-down resistors on D+ and D- USB lines.
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable);
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/*
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* Select OpMode.
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* @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
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* ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode);
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/*
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* Switch to Serial Mode.
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* @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*
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* Notes:
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* Switches immediately to Serial Mode.
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* To return from Serial Mode, STP line needs to be asserted.
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*/
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int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode);
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/*
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* Put PHY into low power mode.
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*
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* Notes:
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* STP line must be driven low to keep the PHY in suspend.
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* To resume the PHY, STP line needs to be asserted.
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*/
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int ulpi_suspend(struct ulpi_viewport *ulpi_vp);
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/*
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* Reset the transceiver. ULPI interface and registers are not affected.
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_reset(struct ulpi_viewport *ulpi_vp);
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/* ULPI access methods below must be implemented for each ULPI viewport. */
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/*
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* Write to the ULPI PHY register via the viewport.
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* @reg - the ULPI register (one of the fields in struct ulpi_regs).
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* Due to ULPI design, only 8 lsb of address are used.
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* @value - the value - only 8 lower bits are used, others ignored.
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*
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* returns 0 on success, ULPI_ERROR on failure.
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*/
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int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);
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/*
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* Read the ULPI PHY register content via the viewport.
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* @reg - the ULPI register (one of the fields in struct ulpi_regs).
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* Due to ULPI design, only 8 lsb of address are used.
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*
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* returns register content on success, ULPI_ERROR on failure.
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*/
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u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg);
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/*
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* Wait for the reset to complete.
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* The Link must not attempt to access the PHY until the reset has
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* completed and DIR line is de-asserted.
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*/
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int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp);
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/* Access Extended Register Set (indicator) */
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#define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */
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/* Vendor-specific */
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#define VENDOR_SPEC_OFFSET 0x30
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/*
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* Extended Register Set
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*
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* Addresses 0x00-0x3F map directly to Immediate Register Set.
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* Addresses 0x40-0x7F are reserved.
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* Addresses 0x80-0xff are vendor-specific.
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*/
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#define EXT_VENDOR_SPEC_OFFSET 0x80
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/* ULPI registers, bits and offsets definitions */
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struct ulpi_regs {
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/* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
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u8 vendor_id_low;
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u8 vendor_id_high;
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u8 product_id_low;
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u8 product_id_high;
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/* Function Control: 0x04 - 0x06 Read */
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u8 function_ctrl; /* 0x04 Write */
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u8 function_ctrl_set; /* 0x05 Set */
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u8 function_ctrl_clear; /* 0x06 Clear */
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/* Interface Control: 0x07 - 0x09 Read */
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u8 iface_ctrl; /* 0x07 Write */
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u8 iface_ctrl_set; /* 0x08 Set */
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u8 iface_ctrl_clear; /* 0x09 Clear */
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/* OTG Control: 0x0A - 0x0C Read */
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u8 otg_ctrl; /* 0x0A Write */
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u8 otg_ctrl_set; /* 0x0B Set */
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u8 otg_ctrl_clear; /* 0x0C Clear */
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/* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
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u8 usb_ie_rising; /* 0x0D Write */
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u8 usb_ie_rising_set; /* 0x0E Set */
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u8 usb_ie_rising_clear; /* 0x0F Clear */
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/* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
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u8 usb_ie_falling; /* 0x10 Write */
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u8 usb_ie_falling_set; /* 0x11 Set */
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u8 usb_ie_falling_clear; /* 0x12 Clear */
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/* USB Interrupt Status: 0x13 Read-only */
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u8 usb_int_status;
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/* USB Interrupt Latch: 0x14 Read-only with auto-clear */
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u8 usb_int_latch;
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/* Debug: 0x15 Read-only */
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u8 debug;
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/* Scratch Register: 0x16 - 0x18 Read */
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u8 scratch; /* 0x16 Write */
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u8 scratch_set; /* 0x17 Set */
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u8 scratch_clear; /* 0x18 Clear */
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/*
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* Optional Carkit registers:
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* Carkit Control: 0x19 - 0x1B Read
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*/
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u8 carkit_ctrl; /* 0x19 Write */
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u8 carkit_ctrl_set; /* 0x1A Set */
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u8 carkit_ctrl_clear; /* 0x1B Clear */
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/* Carkit Interrupt Delay: 0x1C Read, Write */
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u8 carkit_int_delay;
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/* Carkit Interrupt Enable: 0x1D - 0x1F Read */
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u8 carkit_ie; /* 0x1D Write */
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u8 carkit_ie_set; /* 0x1E Set */
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u8 carkit_ie_clear; /* 0x1F Clear */
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/* Carkit Interrupt Status: 0x20 Read-only */
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u8 carkit_int_status;
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/* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
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u8 carkit_int_latch;
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/* Carkit Pulse Control: 0x22 - 0x24 Read */
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u8 carkit_pulse_ctrl; /* 0x22 Write */
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u8 carkit_pulse_ctrl_set; /* 0x23 Set */
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u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */
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/*
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* Other optional registers:
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* Transmit Positive Width: 0x25 Read, Write
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*/
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u8 transmit_pos_width;
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/* Transmit Negative Width: 0x26 Read, Write */
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u8 transmit_neg_width;
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/* Receive Polarity Recovery: 0x27 Read, Write */
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u8 recv_pol_recovery;
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/*
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* Addresses 0x28 - 0x2E are reserved, so we use offsets
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* for immediate registers with higher addresses
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*/
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};
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/*
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* Register Bits
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*/
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/* Function Control */
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#define ULPI_FC_XCVRSEL_MASK (3 << 0)
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#define ULPI_FC_HIGH_SPEED (0 << 0)
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#define ULPI_FC_FULL_SPEED (1 << 0)
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#define ULPI_FC_LOW_SPEED (2 << 0)
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#define ULPI_FC_FS4LS (3 << 0)
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#define ULPI_FC_TERMSELECT (1 << 2)
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#define ULPI_FC_OPMODE_MASK (3 << 3)
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#define ULPI_FC_OPMODE_NORMAL (0 << 3)
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#define ULPI_FC_OPMODE_NONDRIVING (1 << 3)
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#define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3)
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#define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3)
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#define ULPI_FC_RESET (1 << 5)
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#define ULPI_FC_SUSPENDM (1 << 6)
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/* Interface Control */
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#define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0)
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#define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1)
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#define ULPI_IFACE_CARKITMODE (1 << 2)
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#define ULPI_IFACE_CLOCKSUSPENDM (1 << 3)
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#define ULPI_IFACE_AUTORESUME (1 << 4)
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#define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5)
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#define ULPI_IFACE_PASSTHRU (1 << 6)
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#define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7)
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/* OTG Control */
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#define ULPI_OTG_ID_PULLUP (1 << 0)
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#define ULPI_OTG_DP_PULLDOWN (1 << 1)
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#define ULPI_OTG_DM_PULLDOWN (1 << 2)
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#define ULPI_OTG_DISCHRGVBUS (1 << 3)
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#define ULPI_OTG_CHRGVBUS (1 << 4)
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#define ULPI_OTG_DRVVBUS (1 << 5)
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#define ULPI_OTG_DRVVBUS_EXT (1 << 6)
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#define ULPI_OTG_EXTVBUSIND (1 << 7)
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/*
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* USB Interrupt Enable Rising,
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* USB Interrupt Enable Falling,
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* USB Interrupt Status and
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* USB Interrupt Latch
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*/
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#define ULPI_INT_HOST_DISCONNECT (1 << 0)
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#define ULPI_INT_VBUS_VALID (1 << 1)
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#define ULPI_INT_SESS_VALID (1 << 2)
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#define ULPI_INT_SESS_END (1 << 3)
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#define ULPI_INT_IDGRD (1 << 4)
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/* Debug */
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#define ULPI_DEBUG_LINESTATE0 (1 << 0)
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#define ULPI_DEBUG_LINESTATE1 (1 << 1)
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/* Carkit Control */
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#define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0)
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#define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1)
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#define ULPI_CARKIT_CTRL_TXDEN (1 << 2)
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#define ULPI_CARKIT_CTRL_RXDEN (1 << 3)
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#define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4)
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#define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5)
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#define ULPI_CARKIT_CTRL_MICEN (1 << 6)
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/* Carkit Interrupt Enable */
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#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0)
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#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1)
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#define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2)
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#define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3)
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#define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4)
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/* Carkit Interrupt Status and Latch */
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#define ULPI_CARKIT_INT_IDFLOAT (1 << 0)
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#define ULPI_CARKIT_INT_CARINTDET (1 << 1)
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#define ULPI_CARKIT_INT_DP (1 << 2)
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/* Carkit Pulse Control*/
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#define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
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#define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
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#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
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#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
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#endif /* __USB_ULPI_H__ */
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