mirror of
https://github.com/AsahiLinux/u-boot
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6d0f6bcf33
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
59 lines
2.1 KiB
C
59 lines
2.1 KiB
C
/*
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* (C) Copyright 2007
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* Michael Schwingen, michael@schwingen.org
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*
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* hardware register definitions for the AcTux-2 board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ACTUX2_HW_H
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#define _ACTUX2_HW_H
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/* 0 = LED off,1 = green, 2 = red, 3 = orange */
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#define ACTUX2_LED1(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
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#define ACTUX2_LED2(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
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#define ACTUX2_LED3(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
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#define ACTUX2_LED4(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
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#define ACTUX2_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
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#define ACTUX2_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
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#define ACTUX2_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
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/*
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* GPIO settings
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*/
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#define CONFIG_SYS_GPIO_DBGINT 0
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#define CONFIG_SYS_GPIO_ETHINT 1
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#define CONFIG_SYS_GPIO_ETHRST 2 /* Out */
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#define CONFIG_SYS_GPIO_LED5_GN 3 /* Out */
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#define CONFIG_SYS_GPIO_UNUSED4 4
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#define CONFIG_SYS_GPIO_UNUSED5 5
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#define CONFIG_SYS_GPIO_DSR 6 /* Out */
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#define CONFIG_SYS_GPIO_DCD 7 /* Out */
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#define CONFIG_SYS_GPIO_IPAC_INT 8
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#define CONFIG_SYS_GPIO_DBGJUMPER 9
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#define CONFIG_SYS_GPIO_BUTTON1 10
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#define CONFIG_SYS_GPIO_DBGSENSE 11
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#define CONFIG_SYS_GPIO_DTR 12
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#define CONFIG_SYS_GPIO_IORST 13 /* Out */
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#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
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#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
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#endif
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