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66006f86e8
Implement setbrg in amlogic/meson serial device with driver model similar to how the meson_uart.c driver does it in Linux. Also configure (probe) the serial device with the new reg5 register. Signed-off-by: Edoardo Tomelleri <e.tomell@gmail.com> Link: https://lore.kernel.org/r/20220918161701.572814-1-e.tomell@gmail.com Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
265 lines
6.4 KiB
C
265 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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#include <serial.h>
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#include <clk.h>
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struct meson_uart {
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u32 wfifo;
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u32 rfifo;
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u32 control;
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u32 status;
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u32 misc;
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u32 reg5; /* New baud control register */
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};
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struct meson_serial_plat {
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struct meson_uart *reg;
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};
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/* AML_UART_STATUS bits */
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#define AML_UART_PARITY_ERR BIT(16)
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#define AML_UART_FRAME_ERR BIT(17)
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#define AML_UART_TX_FIFO_WERR BIT(18)
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#define AML_UART_RX_EMPTY BIT(20)
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#define AML_UART_TX_FULL BIT(21)
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#define AML_UART_TX_EMPTY BIT(22)
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#define AML_UART_XMIT_BUSY BIT(25)
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#define AML_UART_ERR (AML_UART_PARITY_ERR | \
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AML_UART_FRAME_ERR | \
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AML_UART_TX_FIFO_WERR)
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/* AML_UART_CONTROL bits */
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#define AML_UART_TX_EN BIT(12)
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#define AML_UART_RX_EN BIT(13)
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#define AML_UART_TX_RST BIT(22)
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#define AML_UART_RX_RST BIT(23)
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#define AML_UART_CLR_ERR BIT(24)
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/* AML_UART_REG5 bits */
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#define AML_UART_REG5_XTAL_DIV2 BIT(27)
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#define AML_UART_REG5_XTAL_CLK_SEL BIT(26) /* default 0 (div by 3), 1 for no div */
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#define AML_UART_REG5_USE_XTAL_CLK BIT(24) /* default 1 (use crystal as clock source) */
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#define AML_UART_REG5_USE_NEW_BAUD BIT(23) /* default 1 (use new baud rate register) */
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#define AML_UART_REG5_BAUD_MASK 0x7fffff
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static u32 meson_calc_baud_divisor(ulong src_rate, u32 baud)
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{
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/*
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* Usually src_rate is 24 MHz (from crystal) as clock source for serial
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* device. Since 8 Mb/s is the maximum supported baud rate, use div by 3
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* to derive baud rate. This choice is used also in meson_serial_setbrg.
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*/
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return DIV_ROUND_CLOSEST(src_rate / 3, baud) - 1;
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}
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static void meson_serial_set_baud(struct meson_uart *uart, ulong src_rate, u32 baud)
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{
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/*
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* Set crystal divided by 3 (regardless of device tree clock property)
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* as clock source and the corresponding divisor to approximate baud
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*/
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u32 divisor = meson_calc_baud_divisor(src_rate, baud);
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u32 val = AML_UART_REG5_USE_XTAL_CLK | AML_UART_REG5_USE_NEW_BAUD |
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(divisor & AML_UART_REG5_BAUD_MASK);
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writel(val, &uart->reg5);
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}
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static void meson_serial_init(struct meson_uart *uart)
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{
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u32 val;
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val = readl(&uart->control);
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val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
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writel(val, &uart->control);
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val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
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writel(val, &uart->control);
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val |= (AML_UART_RX_EN | AML_UART_TX_EN);
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writel(val, &uart->control);
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}
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static int meson_serial_probe(struct udevice *dev)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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struct clk per_clk;
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int ret = clk_get_by_name(dev, "baud", &per_clk);
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if (ret)
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return ret;
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ulong rate = clk_get_rate(&per_clk);
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meson_serial_set_baud(uart, rate, CONFIG_BAUDRATE);
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meson_serial_init(uart);
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return 0;
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}
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static void meson_serial_rx_error(struct udevice *dev)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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u32 val = readl(&uart->control);
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/* Clear error */
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val |= AML_UART_CLR_ERR;
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writel(val, &uart->control);
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val &= ~AML_UART_CLR_ERR;
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writel(val, &uart->control);
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/* Remove spurious byte from fifo */
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readl(&uart->rfifo);
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}
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static int meson_serial_getc(struct udevice *dev)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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uint32_t status = readl(&uart->status);
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if (status & AML_UART_RX_EMPTY)
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return -EAGAIN;
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if (status & AML_UART_ERR) {
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meson_serial_rx_error(dev);
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return -EIO;
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}
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return readl(&uart->rfifo) & 0xff;
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}
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static int meson_serial_putc(struct udevice *dev, const char ch)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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if (readl(&uart->status) & AML_UART_TX_FULL)
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return -EAGAIN;
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writel(ch, &uart->wfifo);
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return 0;
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}
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static int meson_serial_setbrg(struct udevice *dev, const int baud)
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{
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/*
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* Change device baud rate if baud is reasonable (considering a 23 bit
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* counter with an 8 MHz clock input) and the actual baud
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* rate is within 2% of the requested value (2% is arbitrary).
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*/
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if (baud < 1 || baud > 8000000)
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return -EINVAL;
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struct meson_serial_plat *const plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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struct clk per_clk;
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int ret = clk_get_by_name(dev, "baud", &per_clk);
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if (ret)
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return ret;
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ulong rate = clk_get_rate(&per_clk);
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u32 divisor = meson_calc_baud_divisor(rate, baud);
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u32 calc_baud = (rate / 3) / (divisor + 1);
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u32 calc_err = baud > calc_baud ? baud - calc_baud : calc_baud - baud;
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if (((calc_err * 100) / baud) > 2)
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return -EINVAL;
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meson_serial_set_baud(uart, rate, baud);
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return 0;
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}
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static int meson_serial_pending(struct udevice *dev, bool input)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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struct meson_uart *const uart = plat->reg;
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uint32_t status = readl(&uart->status);
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if (input) {
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if (status & AML_UART_RX_EMPTY)
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return false;
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/*
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* Handle and drop any RX error here to avoid
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* returning true here when an error byte is in the FIFO
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*/
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if (status & AML_UART_ERR) {
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meson_serial_rx_error(dev);
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return false;
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}
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return true;
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} else {
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return !(status & AML_UART_TX_FULL);
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}
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}
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static int meson_serial_of_to_plat(struct udevice *dev)
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{
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struct meson_serial_plat *plat = dev_get_plat(dev);
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fdt_addr_t addr;
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addr = dev_read_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->reg = (struct meson_uart *)addr;
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return 0;
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}
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static const struct dm_serial_ops meson_serial_ops = {
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.putc = meson_serial_putc,
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.pending = meson_serial_pending,
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.getc = meson_serial_getc,
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.setbrg = meson_serial_setbrg,
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};
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static const struct udevice_id meson_serial_ids[] = {
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{ .compatible = "amlogic,meson-uart" },
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{ .compatible = "amlogic,meson-gx-uart" },
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{ }
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};
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U_BOOT_DRIVER(serial_meson) = {
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.name = "serial_meson",
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.id = UCLASS_SERIAL,
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.of_match = meson_serial_ids,
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.probe = meson_serial_probe,
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.ops = &meson_serial_ops,
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.of_to_plat = meson_serial_of_to_plat,
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.plat_auto = sizeof(struct meson_serial_plat),
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};
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#ifdef CONFIG_DEBUG_UART_MESON
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct meson_uart *regs = (struct meson_uart *)CONFIG_VAL(DEBUG_UART_BASE);
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while (readl(®s->status) & AML_UART_TX_FULL)
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;
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writel(ch, ®s->wfifo);
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}
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DEBUG_UART_FUNCS
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#endif
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