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https://github.com/AsahiLinux/u-boot
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e229d445fc
For i.MX233 addition the base registers need to be change so the SoC definition needs to be known before the header include. The following boards has been changed: * apx4devkit * m28evk * mx28evk * sc_sps_1 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
208 lines
5.8 KiB
C
208 lines
5.8 KiB
C
/*
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* SchulerControl GmbH, SC_SPS_1 module config
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __SC_SPS_1_H__
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#define __SC_SPS_1_H__
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/*
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* SoC configurations
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*/
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#define CONFIG_MX28 /* i.MX28 SoC */
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#define CONFIG_MXS_GPIO /* GPIO control */
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#define CONFIG_SYS_HZ 1000 /* Ticks per second */
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/*
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* Define SC_SPS_1 machine type by hand until it lands in mach-types
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*/
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#define MACH_TYPE_SC_SPS_1 4172
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#define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1
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#include <asm/arch/regs-base.h>
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_OF_LIBFDT
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/*
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* SPL
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*/
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#define CONFIG_SPL
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#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
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#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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/*
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* U-Boot Commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SETEXPR
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#define CONFIG_CMD_USB
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/*
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* Memory configurations
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x40000000 /* Base address */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
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#define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */
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#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
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#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
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#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Point initial SP in SRAM so SPL can use it too. */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
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#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/*
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* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
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* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
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* binary. In case there was more of this mess, 0x100 bytes are skipped.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x40000100
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/*
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* U-Boot general configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Print buffer size */
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Boot argument buffer size */
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#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
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#define CONFIG_AUTO_COMPLETE /* Command auto complete */
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#define CONFIG_CMDLINE_EDITING /* Command history etc */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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/*
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* Serial Driver
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*/
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* MMC Driver
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_APBH_DMA
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#define CONFIG_MMC
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#define CONFIG_MMC_BOUNCE_BUFFER
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MXS_MMC
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#endif
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#define CONFIG_ENV_SIZE (16 * 1024)
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#ifdef CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (256 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/*
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* Ethernet on SOC (FEC)
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_MULTI
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#define CONFIG_MII
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#define CONFIG_DISCOVER_PHY
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_SMSC
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#endif
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MXS
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#define CONFIG_EHCI_MXS_PORT 0
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_STORAGE
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#endif
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/*
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* Boot Linux
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*/
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
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#define CONFIG_BOOTCOMMAND "bootm "
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#define CONFIG_LOADADDR 0x42000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/*
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* Extra Environments
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"update_sd_firmware_filename=u-boot.sd\0" \
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"update_sd_firmware=" /* Update the SD firmware partition */ \
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"if mmc rescan ; then " \
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"if tftp ${update_sd_firmware_filename} ; then " \
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"setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
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"setexpr fw_sz ${fw_sz} + 1 ; " \
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"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
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"fi ; " \
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"fi\0"
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#endif /* __SC_SPS_1_H__ */
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