u-boot/doc

			   XES XPedite1000 Board

		    Last Update: December 29, 2003
=======================================================================

This file contains some handy info regarding U-Boot and the XES
XPedite1000 PPC440GX PrPMC board. See the README.ppc440 for additional
information.


SWITCH SETTINGS & JUMPERS
==========================

Jumpers selected for AMD29LV040B flash part as the boot flash.


I2C Strap EEPROM & Environment Settings
=======================================

The XPedite1000 uses a single I2C eeprom for the 440 strappings and for
the environment variables.  The first page (256 bytes) contains the
strappings and the 2 EMAC HW Ethernet addresses.  Be careful not to
change the 1st page of the EEPROM!  Unpopulated jumper J560 can get you
out of trouble as it disables the strapping read from EEPROM.

I2C iprobe
=====================

The i2c utilities work and have been tested on Rev B. of the 440GX. See
README.ebony for more information about i2c probing with the 440.


GETTING OUT OF I2C TROUBLE
===========================

(Direct quote from README.ebony)
If you're like me ... you may have screwed up your bootstrap serial
eeprom ... or worse, your SPD eeprom when experimenting with the
i2c commands. If so, here are some ideas on how to get out of
trouble:

Serial bootstrap eeprom corruption:
-----------------------------------
Power down the board and set the following straps:

J560 - closed

This will select the default sys0 and sys1 settings (the serial
eeproms are not used). Then power up the board and fix the serial
eeprom using the imm command. Here are the values I currently
use:

=> imd 50 0 10

0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00    .}B.............

Once you have the eeproms set correctly change the
J560 straps as you desire.


PPC440GX Ethernet EMACs
=======================

The XES XPedite1000 uses emac 2 & 3 and ignores emac 0 & 1.  PHYs are connected
only to emac 2 & 3.  The HW Ethernet addresses are read from the i2c eeprom and
placed in the bd info structure for enet2addr and enet3addr.  The ethernet driver
senses that enetaddr and enet1addr are 0's and does not use them.

As of this writing gigabit ethernet and the TCPIP acceleration hardware is not
supported.


Flash Support
=============

As of this writing, there is support for the 1/2mb boot flash only.  User flash
is not yet supported.


Regards,
--Travis
<travis.sawyer@sandburst.com>