mirror of
https://github.com/AsahiLinux/u-boot
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60b9b47d29
Stop using the device tree as a source for ad-hoc information.
This reverts commit 2ae7adc659.
Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
138 lines
4.6 KiB
C
138 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019 Broadcom.
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*/
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#ifndef __GIC_V3_H__
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#define __GIC_V3_H__
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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#define GICR_CTLR_ENABLE_LPIS BIT(0)
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#define GICR_CTLR_RWP BIT(3)
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#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff)
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#define GICR_WAKER_PROCESSORSLEEP BIT(1)
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#define GICR_WAKER_CHILDRENASLEEP BIT(2)
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#define GIC_BASER_CACHE_NCNB 0ULL
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#define GIC_BASER_CACHE_SAMEASINNER 0ULL
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#define GIC_BASER_CACHE_NC 1ULL
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#define GIC_BASER_CACHE_RAWT 2ULL
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#define GIC_BASER_CACHE_RAWB 3ULL
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#define GIC_BASER_CACHE_WAWT 4ULL
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#define GIC_BASER_CACHE_WAWB 5ULL
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#define GIC_BASER_CACHE_RAWAWT 6ULL
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#define GIC_BASER_CACHE_RAWAWB 7ULL
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#define GIC_BASER_CACHE_MASK 7ULL
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#define GIC_BASER_NONSHAREABLE 0ULL
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#define GIC_BASER_INNERSHAREABLE 1ULL
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#define GIC_BASER_OUTERSHAREABLE 2ULL
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#define GIC_BASER_SHAREABILITY_MASK 3ULL
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#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \
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(GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT)
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#define GIC_BASER_SHAREABILITY(reg, type) \
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(GIC_BASER_##type << reg##_SHAREABILITY_SHIFT)
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/* encode a size field of width @w containing @n - 1 units */
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#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\
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GENMASK_ULL(((w) - 1), 0))
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#define GICR_PROPBASER_SHAREABILITY_SHIFT (10)
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#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7)
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#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56)
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#define GICR_PROPBASER_SHAREABILITY_MASK \
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GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK)
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#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
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#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
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#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK
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#define GICR_PROPBASER_INNERSHAREABLE \
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GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE)
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#define GICR_PROPBASER_NCNB \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB)
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#define GICR_PROPBASER_NC \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC)
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#define GICR_PROPBASER_RAWT \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT)
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#define GICR_PROPBASER_RAWB \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB)
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#define GICR_PROPBASER_WAWT \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT)
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#define GICR_PROPBASER_WAWB \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB)
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#define GICR_PROPBASER_RAWAWT \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT)
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#define GICR_PROPBASER_RAWAWB \
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GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB)
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#define GICR_PROPBASER_IDBITS_MASK (0x1f)
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#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12))
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#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16))
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#define GICR_PENDBASER_SHAREABILITY_SHIFT (10)
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#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7)
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#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56)
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#define GICR_PENDBASER_SHAREABILITY_MASK \
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GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK)
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#define GICR_PENDBASER_INNER_CACHEABILITY_MASK \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
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#define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
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#define GICR_PENDBASER_CACHEABILITY_MASK \
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GICR_PENDBASER_INNER_CACHEABILITY_MASK
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#define GICR_PENDBASER_INNERSHAREABLE \
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GIC_BASER_SHAREABILITY(GICR_PENDBASER, INNERSHAREABLE)
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#define GICR_PENDBASER_NCNB \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NCNB)
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#define GICR_PENDBASER_NC \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NC)
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#define GICR_PENDBASER_RAWT \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWT)
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#define GICR_PENDBASER_RAWB \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWB)
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#define GICR_PENDBASER_WAWT \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWT)
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#define GICR_PENDBASER_WAWB \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWB)
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#define GICR_PENDBASER_RAWAWT \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWT)
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#define GICR_PENDBASER_RAWAWB \
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GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWB)
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#define GICR_PENDBASER_PTZ BIT_ULL(62)
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#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */
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#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1)
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#define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1)
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#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32)
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/* Message based interrupts support */
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#define GICD_TYPER_MBIS BIT(16)
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/* LPI support */
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#define GICD_TYPER_LPIS BIT(17)
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#define GICD_TYPER_RSS BIT(26)
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#define GIC_REDISTRIBUTOR_OFFSET 0x20000
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#ifdef CONFIG_GIC_V3_ITS
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int gic_lpi_tables_init(u64 base, u32 max_redist);
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#else
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int gic_lpi_tables_init(u64 base, u32 max_redist)
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{
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return 0;
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}
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#endif /* CONFIG_GIC_V3_ITS */
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#endif /* __GIC_V3_H__ */
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