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2d67a095dc
Driver for Cadence EDAC DDR controller, as found in the Renesas RZ/N1. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
12 lines
346 B
Text
12 lines
346 B
Text
if RAM || SPL_RAM
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config CADENCE_DDR_CTRL
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bool "Enable Cadence DDR controller"
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depends on DM
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help
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Enable support for Cadence DDR controller, as found on
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the Renesas RZ/N1 SoC. This controller has a large number
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of registers which need to be programmed, mostly using values
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obtained from Denali SOMA files via a TCL script.
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endif
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