Daniel Schwierzeck 6cb461b4f1 MIPS: fix endianess handling ... Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>		2012-04-02 15:54:53 +02:00
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cpu	MIPS: fix endianess handling	2012-04-02 15:54:53 +02:00
include/asm	mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment	2011-10-23 20:50:43 +02:00
lib	MIPS: board.c: fix init of flash data in bd_info	2012-04-02 15:54:52 +02:00
config.mk	MIPS: Introduce --gc-sections for MIPS	2011-05-10 00:08:10 +09:00