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https://github.com/AsahiLinux/u-boot
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a94a4071d4
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* board.h
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*
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* TI AM335x boards information header
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/**
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* AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and
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* REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame
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* Synchronization Lost errors. The values are the biggest that work
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* reliably with offered video modes and the memory subsystem on the
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* boards. These register have are briefly documented in "7.3.3.5.2
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* Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and
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* REG_COS_COUNT_2 do not have any effect on current versions of
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* AM335x.
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*/
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#define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414
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#define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d
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static inline int board_is_bone(void)
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{
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return board_ti_is("A335BONE");
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}
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static inline int board_is_bone_lt(void)
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{
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return board_ti_is("A335BNLT");
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}
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static inline int board_is_pb(void)
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{
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return board_ti_is("A335PBGL");
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}
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static inline int board_is_bbg1(void)
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{
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return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4);
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}
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static inline int board_is_bben(void)
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{
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return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "SE", 2);
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}
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static inline int board_is_beaglebonex(void)
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{
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return board_is_pb() || board_is_bone() || board_is_bone_lt() ||
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board_is_bbg1() || board_is_bben();
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}
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static inline int board_is_evm_sk(void)
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{
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return board_ti_is("A335X_SK");
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}
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static inline int board_is_idk(void)
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{
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return !strncmp(board_ti_get_config(), "SKU#02", 6);
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}
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static inline int board_is_gp_evm(void)
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{
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return board_ti_is("A33515BB");
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}
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static inline int board_is_evm_15_or_later(void)
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{
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return (board_is_gp_evm() &&
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strncmp("1.5", board_ti_get_rev(), 3) <= 0);
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}
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static inline int board_is_icev2(void)
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{
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return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1);
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}
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/*
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* We have three pin mux functions that must exist. We must be able to enable
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* uart0, for initial output and i2c0 to read the main EEPROM. We then have a
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* main pinmux function that can be overridden to enable all other pinmux that
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* is required on the board.
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*/
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void enable_uart0_pin_mux(void);
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void enable_uart1_pin_mux(void);
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void enable_uart2_pin_mux(void);
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void enable_uart3_pin_mux(void);
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void enable_uart4_pin_mux(void);
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void enable_uart5_pin_mux(void);
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void enable_i2c0_pin_mux(void);
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void enable_i2c2_pin_mux(void);
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void enable_board_pin_mux(void);
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#endif
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