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https://github.com/AsahiLinux/u-boot
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31757f2bea
Import DRAM timings generated by the DDR tool 3.31 which introduce assorted tweaks to the DRAM controller settings. Furthermore, enable DBI to improve noise resilience of the DRAM bus by reducing the number of bit changes on the bus. Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors reported by EDAC . It is not entirely clear why the slightly faster setting does produce sporadic correctable errors, while this one does not, but this could be related to simpler PLL setting at 3600 MTps. Enable inline ECC which is necessary to detect ECC errors and collect statistics by the EDAC driver in Linux. This reduces the DRAM size by 64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available DRAM size becomes 3.5 GiB and for 2 GiB device the available DRAM size becomes 1.8 GiB. Signed-off-by: Marek Vasut <marex@denx.de>
121 lines
2.3 KiB
C
121 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Marek Vasut <marex@denx.de>
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*/
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#include <common.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ddr.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <env.h>
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#include <env_internal.h>
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#include <i2c_eeprom.h>
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#include <malloc.h>
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#include <net.h>
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#include <miiphy.h>
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#include "lpddr4_timing.h"
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#include "../common/dh_common.h"
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#include "../common/dh_imx.h"
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DECLARE_GLOBAL_DATA_PTR;
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int mach_cpu_init(void)
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{
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icache_enable();
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return 0;
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}
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int board_phys_sdram_size(phys_size_t *size)
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{
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const u16 memsz[] = { 512, 1024, 1536, 2048, 3072, 4096, 6144, 8192 };
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const u8 ecc = readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK;
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u8 memcfg = dh_get_memcfg();
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/* 896 kiB, i.e. 1 MiB without 12.5% reserved for in-band ECC */
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*size = (u64)memsz[memcfg] * (SZ_1M - (ecc ? (SZ_1M / 8) : 0));
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return 0;
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}
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static int dh_imx8_setup_ethaddr(void)
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{
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unsigned char enetaddr[6];
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if (dh_mac_is_in_env("ethaddr"))
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return 0;
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if (!dh_imx_get_mac_from_fuse(enetaddr))
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goto out;
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if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
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goto out;
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return -ENXIO;
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out:
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return eth_env_set_enetaddr("ethaddr", enetaddr);
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}
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static int dh_imx8_setup_eth1addr(void)
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{
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unsigned char enetaddr[6];
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if (dh_mac_is_in_env("eth1addr"))
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return 0;
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if (!dh_imx_get_mac_from_fuse(enetaddr))
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goto increment_out;
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if (!dh_get_mac_from_eeprom(enetaddr, "eeprom1"))
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goto out;
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/*
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* Populate second ethernet MAC from first ethernet EEPROM with MAC
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* address LSByte incremented by 1. This is only used on SoMs without
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* second ethernet EEPROM, i.e. early prototypes.
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*/
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if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
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goto increment_out;
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return -ENXIO;
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increment_out:
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enetaddr[5]++;
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out:
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return eth_env_set_enetaddr("eth1addr", enetaddr);
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}
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int dh_setup_mac_address(void)
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{
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int ret;
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ret = dh_imx8_setup_ethaddr();
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if (ret)
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printf("%s: Unable to setup ethaddr! ret = %d\n", __func__, ret);
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ret = dh_imx8_setup_eth1addr();
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if (ret)
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printf("%s: Unable to setup eth1addr! ret = %d\n", __func__, ret);
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return ret;
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}
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int board_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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dh_setup_mac_address();
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return 0;
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}
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enum env_location env_get_location(enum env_operation op, int prio)
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{
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return prio ? ENVL_UNKNOWN : ENVL_SPI_FLASH;
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}
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