u-boot/board/bsh/imx8mn_smm_s2/spl.c
Shiji Yang 506df9dc58 treewide: rework linker symbol declarations in sections header
1. Convert all linker symbols to char[] type so that we can get the
   corresponding address by calling array name 'var' or its address
   '&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
   not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
   only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
   standard header file to declare them.

[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00

82 lines
1.3 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2021 Collabora Ltd.
*
*/
#include <hang.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
#include <asm/arch/imx8mn_pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/gpio.h>
#include <asm/sections.h>
#include <dm/device.h>
#include <dm/uclass.h>
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
return BOOT_DEVICE_BOOTROM;
}
void spl_dram_init(void)
{
ddr_init(&dram_timing);
}
void spl_board_init(void)
{
struct udevice *dev;
int ret;
debug("Normal Boot\n");
ret = uclass_get_device_by_name(UCLASS_CLK,
"clock-controller@30380000",
&dev);
if (ret < 0)
puts("Failed to find clock node. Check device tree\n");
}
int board_early_init_f(void)
{
init_uart_clk(3);
if (IS_ENABLED(CONFIG_NAND_MXS)) {
init_nand_clk();
}
return 0;
}
void board_init_f(ulong dummy)
{
int ret;
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
arch_cpu_init();
board_early_init_f();
timer_init();
ret = spl_init();
if (ret) {
debug("spl_init() failed: %d\n", ret);
hang();
}
preloader_console_init();
enable_tzc380();
/* DDR initialization */
spl_dram_init();
board_init_r(NULL, 0);
}