mirror of
https://github.com/AsahiLinux/u-boot
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851db35e2d
This patch adds support the generic watchdog timer for s5pc1xx and exynos4 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: HeungJun, Kim <riverful.kim@samsung.com>
104 lines
3 KiB
C
104 lines
3 KiB
C
/*
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* (C) Copyright 2009 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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* Heungjun Kim <riverful.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef _S5PC1XX_CPU_H
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#define _S5PC1XX_CPU_H
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#define S5PC1XX_ADDR_BASE 0xE0000000
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/* S5PC100 */
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#define S5PC100_PRO_ID 0xE0000000
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#define S5PC100_CLOCK_BASE 0xE0100000
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#define S5PC100_GPIO_BASE 0xE0300000
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#define S5PC100_VIC0_BASE 0xE4000000
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#define S5PC100_VIC1_BASE 0xE4100000
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#define S5PC100_VIC2_BASE 0xE4200000
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#define S5PC100_DMC_BASE 0xE6000000
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#define S5PC100_SROMC_BASE 0xE7000000
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#define S5PC100_ONENAND_BASE 0xE7100000
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#define S5PC100_PWMTIMER_BASE 0xEA000000
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#define S5PC100_WATCHDOG_BASE 0xEA200000
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#define S5PC100_UART_BASE 0xEC000000
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#define S5PC100_MMC_BASE 0xED800000
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/* S5PC110 */
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#define S5PC110_PRO_ID 0xE0000000
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#define S5PC110_CLOCK_BASE 0xE0100000
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#define S5PC110_GPIO_BASE 0xE0200000
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#define S5PC110_PWMTIMER_BASE 0xE2500000
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#define S5PC110_WATCHDOG_BASE 0xE2700000
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#define S5PC110_UART_BASE 0xE2900000
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#define S5PC110_SROMC_BASE 0xE8000000
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#define S5PC110_MMC_BASE 0xEB000000
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#define S5PC110_DMC0_BASE 0xF0000000
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#define S5PC110_DMC1_BASE 0xF1400000
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#define S5PC110_VIC0_BASE 0xF2000000
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#define S5PC110_VIC1_BASE 0xF2100000
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#define S5PC110_VIC2_BASE 0xF2200000
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#define S5PC110_VIC3_BASE 0xF2300000
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#define S5PC110_OTG_BASE 0xEC000000
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#define S5PC110_PHY_BASE 0xEC100000
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#define S5PC110_USB_PHY_CONTROL 0xE010E80C
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#ifndef __ASSEMBLY__
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#include <asm/io.h>
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/* CPU detection macros */
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extern unsigned int s5p_cpu_id;
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static inline void s5p_set_cpu_id(void)
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{
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s5p_cpu_id = readl(S5PC100_PRO_ID);
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s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12);
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}
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#define IS_SAMSUNG_TYPE(type, id) \
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static inline int cpu_is_##type(void) \
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{ \
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return s5p_cpu_id == id ? 1 : 0; \
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}
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IS_SAMSUNG_TYPE(s5pc100, 0xc100)
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IS_SAMSUNG_TYPE(s5pc110, 0xc110)
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#define SAMSUNG_BASE(device, base) \
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static inline unsigned int samsung_get_base_##device(void) \
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{ \
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if (cpu_is_s5pc100()) \
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return S5PC100_##base; \
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else if (cpu_is_s5pc110()) \
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return S5PC110_##base; \
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else \
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return 0; \
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}
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SAMSUNG_BASE(clock, CLOCK_BASE)
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SAMSUNG_BASE(gpio, GPIO_BASE)
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SAMSUNG_BASE(pro_id, PRO_ID)
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SAMSUNG_BASE(mmc, MMC_BASE)
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SAMSUNG_BASE(sromc, SROMC_BASE)
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SAMSUNG_BASE(timer, PWMTIMER_BASE)
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SAMSUNG_BASE(uart, UART_BASE)
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SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
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#endif
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#endif /* _S5PC1XX_CPU_H */
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