mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
e895a4b06f
This function can fail if the device tree runs out of space. Rather than silently booting with an incomplete device tree, allow the failure to be detected. Unfortunately this involves changing a lot of places in the code. I have not changed behvaiour to return an error where one is not currently returned, to avoid unexpected breakage. Eventually it would be nice to allow boards to register functions to be called to update the device tree. This would avoid all the many functions to do this. However it's not clear yet if this should be done using driver model or with a linker list. This work is left for later. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
84 lines
2 KiB
C
84 lines
2 KiB
C
/*
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* Copyright 2010 Extreme Engineering Solutions, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_pci.h>
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#include <asm/io.h>
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#include <asm/cache.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <pca953x.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern void ft_board_pci_setup(void *blob, bd_t *bd);
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static void flash_cs_fixup(void)
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{
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int flash_sel;
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/*
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* Print boot dev and swap flash flash chip selects if booted from 2nd
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* flash. Swapping chip selects presents user with a common memory
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* map regardless of which flash was booted from.
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*/
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flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
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CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS));
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printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1);
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if (flash_sel) {
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set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
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set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
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set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
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set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
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}
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}
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int board_early_init_r(void)
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{
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/* Initialize PCA9557 devices */
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0);
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/*
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* Remap NOR flash region to caching-inhibited
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* so that flash can be erased/programmed properly.
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*/
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* Invalidate existing TLB entry for NOR flash */
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disable_tlb(0);
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set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
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(CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
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0, 0, BOOKE_PAGESZ_256M, 1);
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flash_cs_fixup();
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_PCI
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ft_board_pci_setup(blob, bd);
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#endif
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ft_cpu_setup(blob, bd);
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return 0;
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}
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#endif
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