mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
40f6fffee5
The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
196 lines
5.6 KiB
C
196 lines
5.6 KiB
C
/*
|
|
* Copyright (C) 2011 Freescale Semiconductor, Inc.
|
|
*
|
|
* Configuration settings for the MX53ARD Freescale board.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
#define CONFIG_MX53
|
|
|
|
#define CONFIG_SYS_MX5_HCLK 24000000
|
|
#define CONFIG_SYS_MX5_CLK32 32768
|
|
#define CONFIG_DISPLAY_CPUINFO
|
|
#define CONFIG_DISPLAY_BOARDINFO
|
|
|
|
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
|
|
|
|
#include <asm/arch/imx-regs.h>
|
|
|
|
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
|
|
#define CONFIG_SETUP_MEMORY_TAGS
|
|
#define CONFIG_INITRD_TAG
|
|
|
|
/* Size of malloc() pool */
|
|
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
|
|
|
|
#define CONFIG_BOARD_EARLY_INIT_F
|
|
#define CONFIG_MXC_GPIO
|
|
|
|
#define CONFIG_MXC_UART
|
|
#define CONFIG_MXC_UART_BASE UART1_BASE
|
|
|
|
/* I2C Configs */
|
|
#define CONFIG_CMD_I2C
|
|
#define CONFIG_HARD_I2C
|
|
#define CONFIG_I2C_MXC
|
|
#define CONFIG_SYS_I2C_MX53_PORT2
|
|
#define CONFIG_SYS_I2C_SPEED 100000
|
|
#define CONFIG_SYS_I2C_SLAVE 0xfe
|
|
|
|
/* MMC Configs */
|
|
#define CONFIG_FSL_ESDHC
|
|
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
|
#define CONFIG_SYS_FSL_ESDHC_NUM 2
|
|
|
|
#define CONFIG_MMC
|
|
#define CONFIG_CMD_MMC
|
|
#define CONFIG_GENERIC_MMC
|
|
#define CONFIG_CMD_FAT
|
|
#define CONFIG_DOS_PARTITION
|
|
|
|
/* Eth Configs */
|
|
#define CONFIG_HAS_ETH1
|
|
#define CONFIG_MII
|
|
#define CONFIG_MII_GASKET
|
|
#define CONFIG_DISCOVER_PHY
|
|
|
|
#define CONFIG_CMD_PING
|
|
#define CONFIG_CMD_DHCP
|
|
#define CONFIG_CMD_MII
|
|
#define CONFIG_CMD_NET
|
|
|
|
/* allow to overwrite serial and ethaddr */
|
|
#define CONFIG_ENV_OVERWRITE
|
|
#define CONFIG_CONS_INDEX 1
|
|
#define CONFIG_BAUDRATE 115200
|
|
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
|
|
|
|
/* Command definition */
|
|
#include <config_cmd_default.h>
|
|
|
|
#undef CONFIG_CMD_IMLS
|
|
|
|
#define CONFIG_BOOTDELAY 3
|
|
|
|
#define CONFIG_ETHPRIME "smc911x"
|
|
|
|
/*Support LAN9217*/
|
|
#define CONFIG_SMC911X
|
|
#define CONFIG_SMC911X_16_BIT
|
|
#define CONFIG_SMC911X_BASE CS1_BASE_ADDR
|
|
|
|
#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
|
|
#define CONFIG_SYS_TEXT_BASE 0x77800000
|
|
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
"script=boot.scr\0" \
|
|
"uimage=uImage\0" \
|
|
"mmcdev=0\0" \
|
|
"mmcpart=2\0" \
|
|
"mmcroot=/dev/mmcblk0p3 rw\0" \
|
|
"mmcrootfstype=ext3 rootwait\0" \
|
|
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
|
"root=${mmcroot} " \
|
|
"rootfstype=${mmcrootfstype}\0" \
|
|
"loadbootscript=" \
|
|
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
|
"bootscript=echo Running bootscript from mmc ...; " \
|
|
"source\0" \
|
|
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
|
"mmcboot=echo Booting from mmc ...; " \
|
|
"run mmcargs; " \
|
|
"bootm\0" \
|
|
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
|
"root=/dev/nfs " \
|
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
|
"netboot=echo Booting from net ...; " \
|
|
"run netargs; " \
|
|
"dhcp ${uimage}; bootm\0" \
|
|
|
|
#define CONFIG_BOOTCOMMAND \
|
|
"if mmc rescan ${mmcdev}; then " \
|
|
"if run loadbootscript; then " \
|
|
"run bootscript; " \
|
|
"else " \
|
|
"if run loaduimage; then " \
|
|
"run mmcboot; " \
|
|
"else run netboot; " \
|
|
"fi; " \
|
|
"fi; " \
|
|
"else run netboot; fi"
|
|
#define CONFIG_ARP_TIMEOUT 200UL
|
|
|
|
/* Miscellaneous configurable options */
|
|
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
|
#define CONFIG_SYS_PROMPT "MX53ARD U-Boot > "
|
|
#define CONFIG_AUTO_COMPLETE
|
|
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
|
|
/* Print Buffer Size */
|
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
|
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
|
|
#define CONFIG_SYS_MEMTEST_START 0x70000000
|
|
#define CONFIG_SYS_MEMTEST_END 0x70010000
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
|
|
#define CONFIG_SYS_HZ 1000
|
|
#define CONFIG_CMDLINE_EDITING
|
|
|
|
/* Stack sizes */
|
|
#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
|
|
|
|
/* Physical Memory Map */
|
|
#define CONFIG_NR_DRAM_BANKS 2
|
|
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
|
|
#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
|
|
#define PHYS_SDRAM_2 CSD1_BASE_ADDR
|
|
#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
|
|
#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
|
|
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
|
|
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
|
|
|
|
#define CONFIG_SYS_INIT_SP_OFFSET \
|
|
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
|
#define CONFIG_SYS_INIT_SP_ADDR \
|
|
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
|
|
|
/* FLASH and environment organization */
|
|
#define CONFIG_SYS_NO_FLASH
|
|
|
|
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
|
|
#define CONFIG_ENV_SIZE (8 * 1024)
|
|
#define CONFIG_ENV_IS_IN_MMC
|
|
#define CONFIG_SYS_MMC_ENV_DEV 0
|
|
|
|
#define CONFIG_OF_LIBFDT
|
|
|
|
#define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
|
|
#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
|
|
#define MX53ARD_CS1RCR2 RBEN(2)
|
|
#define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
|
|
|
|
#endif /* __CONFIG_H */
|