mirror of
https://github.com/AsahiLinux/u-boot
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2775250492
Drop unused code related to CONFIG_TDX_EASY_INSTALLER, that existed only on toradex downstream branch. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
69 lines
2 KiB
C
69 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2022 Toradex
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*/
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#ifndef __VERDIN_IMX8MP_H
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#define __VERDIN_IMX8MP_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#define CFG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CFG_MALLOC_F_ADDR 0x184000
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/* For RAW image gives a error info not panic */
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#endif /* CONFIG_SPL_BUILD */
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#define MEM_LAYOUT_ENV_SETTINGS \
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"fdt_addr_r=0x50200000\0" \
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"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"kernel_comp_addr_r=0x40200000\0" \
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"kernel_comp_size=0x08000000\0" \
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"ramdisk_addr_r=0x50300000\0" \
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"scriptaddr=0x50280000\0"
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/* Enable Distro Boot */
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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/* Initial environment variables */
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#define CFG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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"bootcmd_mfg=fastboot 0\0" \
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"boot_file=Image\0" \
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"boot_scripts=boot.scr\0" \
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"boot_script_dhcp=boot.scr\0" \
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"console=ttymxc2\0" \
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"fdt_board=dev\0" \
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"initrd_addr=0x43800000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
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"consoleblank=0 earlycon\0" \
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"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
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"if test \"$confirm\" = \"y\"; then " \
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"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
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"${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
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"${blkcnt}; fi\0"
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#define CFG_SYS_INIT_RAM_ADDR 0x40000000
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#define CFG_SYS_INIT_RAM_SIZE SZ_512K
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/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
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#define CFG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
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#define PHYS_SDRAM_2 0x100000000
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#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
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#endif /* __VERDIN_IMX8MP_H */
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