mirror of
https://github.com/AsahiLinux/u-boot
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324 lines
8.1 KiB
C
324 lines
8.1 KiB
C
/*
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* Copyright (C) 2003 ETC s.r.o.
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*
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* This code was inspired by Marius Groeger and Kyle Harris code
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* available in other board ports for U-Boot
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Written by Peter Figuli <peposh@etc.sk>, 2003.
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*
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*/
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#include <common.h>
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#include "intel.h"
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/*
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* This code should handle CFI FLASH memory device. This code is very
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* minimalistic approach without many essential error handling code as well.
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* Because U-Boot actually is missing smart handling of FLASH device,
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* we just set flash_id to anything else to FLASH_UNKNOW, so common code
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* can call us without any restrictions.
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* TODO: Add CFI Query, to be able to determine FLASH device.
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* TODO: Add error handling code
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* NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
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* hopefully may work with other configurations.
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*/
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#if ( SCB9328_FLASH_BUS_WIDTH == 1 )
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# define FLASH_BUS vu_char
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# define FLASH_BUS_RET u_char
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# if ( SCB9328_FLASH_INTERLEAVE == 1 )
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# define FLASH_CMD( x ) x
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# else
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# error "With 8bit bus only one chip is allowed"
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# endif
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#elif ( SCB9328_FLASH_BUS_WIDTH == 2 )
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# define FLASH_BUS vu_short
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# define FLASH_BUS_RET u_short
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# if ( SCB9328_FLASH_INTERLEAVE == 1 )
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# define FLASH_CMD( x ) x
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# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
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# define FLASH_CMD( x ) (( x << 8 )| x )
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# else
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# error "With 16bit bus only 1 or 2 chip(s) are allowed"
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# endif
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#elif ( SCB9328_FLASH_BUS_WIDTH == 4 )
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# define FLASH_BUS vu_long
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# define FLASH_BUS_RET u_long
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# if ( SCB9328_FLASH_INTERLEAVE == 1 )
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# define FLASH_CMD( x ) x
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# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
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# define FLASH_CMD( x ) (( x << 16 )| x )
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# elif ( SCB9328_FLASH_INTERLEAVE == 4 )
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# define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
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# else
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# error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
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# endif
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#else
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# error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
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#endif
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
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static FLASH_BUS_RET flash_status_reg (void)
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{
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FLASH_BUS *addr = (FLASH_BUS *) 0;
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*addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
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return *addr;
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}
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static int flash_ready (ulong timeout)
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{
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int ok = 1;
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reset_timer_masked ();
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while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
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FLASH_CMD (CFI_INTEL_SR_READY)) {
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if (get_timer_masked () > timeout && timeout != 0) {
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ok = 0;
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break;
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}
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}
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return ok;
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}
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#if ( CFG_MAX_FLASH_BANKS != 1 )
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# error "SCB9328 platform has only one flash bank!"
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#endif
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ulong flash_init (void)
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{
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int i;
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unsigned long address = SCB9328_FLASH_BASE;
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flash_info[0].size = SCB9328_FLASH_BANK_SIZE;
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flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
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flash_info[0].flash_id = INTEL_MANUFACT;
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memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
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for (i = 0; i < CFG_MAX_FLASH_SECT; i++) {
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flash_info[0].start[i] = address;
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#ifdef SCB9328_FLASH_UNLOCK
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/* Some devices are hw locked after start. */
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*((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
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*((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
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flash_ready (0);
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*((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
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#endif
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address += SCB9328_FLASH_SECT_SIZE;
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}
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flash_protect (FLAG_PROTECT_SET,
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CFG_FLASH_BASE,
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CFG_FLASH_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
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return SCB9328_FLASH_BANK_SIZE;
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}
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void flash_print_info (flash_info_t * info)
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{
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int i;
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printf (" Intel vendor\n");
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if (!(i % 5)) {
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printf ("\n");
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}
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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}
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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int flag, non_protected = 0, sector;
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int rc = ERR_OK;
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FLASH_BUS *address;
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for (sector = s_first; sector <= s_last; sector++) {
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if (!info->protect[sector]) {
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non_protected++;
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}
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}
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if (!non_protected) {
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return ERR_PROTECTED;
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}
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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flag = disable_interrupts ();
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/* Start erase on unprotected sectors */
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for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
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if (info->protect[sector]) {
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printf ("Protected sector %2d skipping...\n", sector);
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continue;
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} else {
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printf ("Erasing sector %2d ... ", sector);
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}
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address = (FLASH_BUS *) (info->start[sector]);
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*address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
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*address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
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if (flash_ready (CFG_FLASH_ERASE_TOUT)) {
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*address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
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printf ("ok.\n");
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} else {
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*address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
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rc = ERR_TIMOUT;
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printf ("timeout! Aborting...\n");
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break;
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}
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*address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
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}
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if (ctrlc ())
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printf ("User Interrupt!\n");
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/* allow flash to settle - wait 10 ms */
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udelay_masked (10000);
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if (flag) {
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enable_interrupts ();
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}
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return rc;
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}
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static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
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{
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FLASH_BUS *address = (FLASH_BUS *) dest;
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int rc = ERR_OK;
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int flag;
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/* Check if Flash is (sufficiently) erased */
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if ((*address & data) != data) {
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return ERR_NOT_ERASED;
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}
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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flag = disable_interrupts ();
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*address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
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*address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
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*address = data;
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if (!flash_ready (CFG_FLASH_WRITE_TOUT)) {
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*address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
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rc = ERR_TIMOUT;
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printf ("timeout! Aborting...\n");
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}
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*address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
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if (flag) {
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enable_interrupts ();
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}
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return rc;
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}
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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ulong read_addr, write_addr;
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FLASH_BUS data;
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int i, result = ERR_OK;
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read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
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write_addr = read_addr;
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if (read_addr != addr) {
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data = 0;
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for (i = 0; i < sizeof (FLASH_BUS); i++) {
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if (read_addr < addr || cnt == 0) {
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data |= *((uchar *) read_addr) << i * 8;
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} else {
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data |= (*src++) << i * 8;
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cnt--;
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}
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read_addr++;
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}
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if ((result = write_data (info, write_addr, data)) != ERR_OK) {
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return result;
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}
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write_addr += sizeof (FLASH_BUS);
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}
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for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
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if ((result = write_data (info, write_addr,
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*((FLASH_BUS *) src))) != ERR_OK) {
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return result;
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}
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write_addr += sizeof (FLASH_BUS);
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src += sizeof (FLASH_BUS);
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}
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if (cnt > 0) {
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read_addr = write_addr;
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data = 0;
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for (i = 0; i < sizeof (FLASH_BUS); i++) {
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if (cnt > 0) {
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data |= (*src++) << i * 8;
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cnt--;
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} else {
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data |= *((uchar *) read_addr) << i * 8;
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}
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read_addr++;
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}
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if ((result = write_data (info, write_addr, data)) != 0) {
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return result;
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}
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}
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return ERR_OK;
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}
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