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https://github.com/AsahiLinux/u-boot
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699c40e878
The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
68 lines
1,013 B
Text
68 lines
1,013 B
Text
/dts-v1/;
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/include/ ARCH_CPU_DTS
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/ {
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model = "NVIDIA Tegra20 Harmony evaluation board";
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compatible = "nvidia,harmony", "nvidia,tegra20";
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aliases {
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usb0 = "/usb@c5008000";
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usb1 = "/usb@c5004000";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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clocks {
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clk_32k: clk_32k {
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clock-frequency = <32000>;
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};
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osc {
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clock-frequency = <12000000>;
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};
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};
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clock@60006000 {
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clocks = <&clk_32k &osc>;
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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i2c@7000c000 {
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status = "disabled";
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};
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i2c@7000c400 {
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status = "disabled";
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};
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i2c@7000c500 {
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status = "disabled";
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};
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i2c@7000d000 {
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status = "disabled";
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};
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usb@c5000000 {
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status = "disabled";
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};
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usb@c5004000 {
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nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
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};
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nand-controller@70008000 {
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nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
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nvidia,width = <8>;
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nvidia,timing = <26 100 20 80 20 10 12 10 70>;
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nand@0 {
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reg = <0>;
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compatible = "hynix,hy27uf4g2b", "nand-flash";
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};
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};
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};
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