mirror of
https://github.com/AsahiLinux/u-boot
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53677ef18e
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
365 lines
10 KiB
C
365 lines
10 KiB
C
/*
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* (C) Copyright 2004
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* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
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*
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* (C) Copyright 2002
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* Configuation settings for the LUBBOCK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
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#define CONFIG_ADSVIX 1 /* on a Adsvix Board */
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#define CONFIG_MMC 1
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#define BOARD_LATE_INIT 1
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define RTC
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* Hardware drivers
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*/
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/*
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* select serial console configuration
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*/
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#define CONFIG_FFUART 1 /* we use FFUART on ADSVIX */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_DOS_PARTITION 1
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_PCMCIA
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#undef CONFIG_CMD_NET
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_SERVERIP 192.168.1.99
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#define CONFIG_BOOTCOMMAND "run boot_flash"
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#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\
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" rw root=/dev/ram initrd=0xa0800000,5m"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"program_boot_cf=" \
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"mw.b 0xa0010000 0xff 0x20000; " \
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"if pinit on && " \
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"ide reset && " \
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"fatload ide 0 0xa0010000 u-boot.bin; " \
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"then " \
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"protect off 0x0 0x1ffff; " \
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"erase 0x0 0x1ffff; " \
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"cp.b 0xa0010000 0x0 0x20000; " \
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"fi\0" \
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"program_uzImage_cf=" \
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"mw.b 0xa0010000 0xff 0x180000; " \
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"if pinit on && " \
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"ide reset && " \
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"fatload ide 0 0xa0010000 uzImage; " \
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"then " \
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"protect off 0x40000 0x1bffff; " \
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"erase 0x40000 0x1bffff; " \
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"cp.b 0xa0010000 0x40000 0x180000; " \
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"fi\0" \
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"program_ramdisk_cf=" \
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"mw.b 0xa0010000 0xff 0x500000; " \
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"if pinit on && " \
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"ide reset && " \
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"fatload ide 0 0xa0010000 ramdisk.gz; " \
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"then " \
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"protect off 0x1c0000 0x6bffff; " \
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"erase 0x1c0000 0x6bffff; " \
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"cp.b 0xa0010000 0x1c0000 0x500000; " \
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"fi\0" \
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"boot_cf=" \
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"if pinit on && " \
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"ide reset && " \
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"fatload ide 0 0xa0030000 uzImage && " \
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"fatload ide 0 0xa0800000 ramdisk.gz; " \
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"then " \
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"bootm 0xa0030000; " \
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"fi\0" \
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"program_boot_mmc=" \
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"mw.b 0xa0010000 0xff 0x20000; " \
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"if mmcinit && " \
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"fatload mmc 0 0xa0010000 u-boot.bin; " \
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"then " \
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"protect off 0x0 0x1ffff; " \
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"erase 0x0 0x1ffff; " \
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"cp.b 0xa0010000 0x0 0x20000; " \
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"fi\0" \
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"program_uzImage_mmc=" \
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"mw.b 0xa0010000 0xff 0x180000; " \
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"if mmcinit && " \
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"fatload mmc 0 0xa0010000 uzImage; " \
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"then " \
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"protect off 0x40000 0x1bffff; " \
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"erase 0x40000 0x1bffff; " \
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"cp.b 0xa0010000 0x40000 0x180000; " \
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"fi\0" \
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"program_ramdisk_mmc=" \
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"mw.b 0xa0010000 0xff 0x500000; " \
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"if mmcinit && " \
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"fatload mmc 0 0xa0010000 ramdisk.gz; " \
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"then " \
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"protect off 0x1c0000 0x6bffff; " \
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"erase 0x1c0000 0x6bffff; " \
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"cp.b 0xa0010000 0x1c0000 0x500000; " \
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"fi\0" \
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"boot_mmc=" \
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"if mmcinit && " \
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"fatload mmc 0 0xa0030000 uzImage && " \
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"fatload mmc 0 0xa0800000 ramdisk.gz; " \
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"then " \
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"bootm 0xa0030000; " \
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"fi\0" \
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"boot_flash=" \
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"cp.b 0x1c0000 0xa0800000 0x500000; " \
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"bootm 0x40000\0" \
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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/* #define CONFIG_INITRD_TAG 1 */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_HUSH_PARSER 1
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#define CFG_PROMPT_HUSH_PS2 "> "
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#define CFG_LONGHELP /* undef to save memory */
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#ifdef CFG_HUSH_PARSER
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#define CFG_PROMPT "$ " /* Monitor Command Prompt */
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#else
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#endif
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_DEVICE_NULLDEV 1
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#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
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#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR 0xa1000000 /* default load address */
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#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
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#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CFG_MMC_BASE 0xF0000000
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/*
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
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#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
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#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
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#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
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#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
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#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
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#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define CFG_DRAM_BASE 0xa0000000
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#define CFG_DRAM_SIZE 0x04000000
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#define CFG_FLASH_BASE PHYS_FLASH_1
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/*
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* GPIO settings
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*/
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#define CFG_GPSR0_VAL 0x00018004
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#define CFG_GPSR1_VAL 0x004F0080
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#define CFG_GPSR2_VAL 0x13EFC000
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#define CFG_GPSR3_VAL 0x0006E032
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#define CFG_GPCR0_VAL 0x084AFE1A
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#define CFG_GPCR1_VAL 0x003003F2
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#define CFG_GPCR2_VAL 0x0C014000
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#define CFG_GPCR3_VAL 0x00000C00
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#define CFG_GPDR0_VAL 0xCBC3BFFC
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#define CFG_GPDR1_VAL 0x00FFABF3
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#define CFG_GPDR2_VAL 0x1EEFFC00
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#define CFG_GPDR3_VAL 0x0187EC32
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#define CFG_GAFR0_L_VAL 0x84400000
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#define CFG_GAFR0_U_VAL 0xA51A8010
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#define CFG_GAFR1_L_VAL 0x699A955A
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#define CFG_GAFR1_U_VAL 0x0005A0AA
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#define CFG_GAFR2_L_VAL 0x40000000
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#define CFG_GAFR2_U_VAL 0x0109A400
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#define CFG_GAFR3_L_VAL 0x54000000
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#define CFG_GAFR3_U_VAL 0x00001409
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#define CFG_PSSR_VAL 0x20
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/*
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* Clock settings
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*/
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#define CFG_CKEN 0x00400200
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#define CFG_CCCR 0x02000290 /* 520Mhz */
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/* #define CFG_CCCR 0x02000210 416 Mhz */
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/*
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* Memory settings
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*/
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#define CFG_MSC0_VAL 0x23F2B3DB
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#define CFG_MSC1_VAL 0x0000CCD1
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#define CFG_MSC2_VAL 0x0000B884
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#define CFG_MDCNFG_VAL 0x08000AC8
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#define CFG_MDREFR_VAL 0x0000001E
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#define CFG_MDMRS_VAL 0x00000000
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#define CFG_FLYCNFG_VAL 0x00010001
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#define CFG_SXCNFG_VAL 0x40044004
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/*
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* PCMCIA and CF Interfaces
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*/
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#define CFG_MECR_VAL 0x00000002
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#define CFG_MCMEM0_VAL 0x00004204
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#define CFG_MCMEM1_VAL 0x00000000
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#define CFG_MCATT0_VAL 0x00010504
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#define CFG_MCATT1_VAL 0x00000000
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#define CFG_MCIO0_VAL 0x00008407
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#define CFG_MCIO1_VAL 0x00000000
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#define CONFIG_PXA_PCMCIA 1
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#define CONFIG_PXA_IDE 1
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#define CONFIG_PCMCIA_SLOT_A 1
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/* just to keep build system happy */
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#define CFG_PCMCIA_MEM_ADDR 0x28000000
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#define CFG_PCMCIA_MEM_SIZE 0x04000000
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#define CFG_IDE_MAXBUS 1
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/* max. 1 IDE bus */
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#define CFG_IDE_MAXDEVICE 1
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/* max. 1 drive per IDE bus */
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#define CFG_ATA_IDE0_OFFSET 0x0000
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#define CFG_ATA_BASE_ADDR 0x20000000
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/* Offset for data I/O */
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#define CFG_ATA_DATA_OFFSET 0x1f0
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/* Offset for normal register accesses */
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#define CFG_ATA_REG_OFFSET 0x1f0
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/* Offset for alternate registers */
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#define CFG_ATA_ALT_OFFSET 0x3f0
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/*
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* FLASH and environment organization
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*/
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#define CFG_FLASH_CFI
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#define CFG_FLASH_CFI_DRIVER 1
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#define CFG_MONITOR_BASE 0
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#define CFG_MONITOR_LEN 0x20000
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
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/* write flash less slowly */
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#define CFG_FLASH_USE_BUFFER_WRITE 1
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/* Flash environment locations */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */
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#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment */
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#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
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#endif /* __CONFIG_H */
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