mirror of
https://github.com/AsahiLinux/u-boot
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262 lines
7.2 KiB
C
262 lines
7.2 KiB
C
/*
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* (C) Copyright 2004
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* Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
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*
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* Support for the Elmeg VoVPN Gateway Module
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* ------------------------------------------
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* Initialize Marvell M88E6060 Switch
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <ioports.h>
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#include <mpc8260.h>
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#include <asm/m8260_pci.h>
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#include <net.h>
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#include <miiphy.h>
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#include "m88e6060.h"
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#if (CONFIG_COMMANDS & CFG_CMD_NET)
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static int prtTab[M88X_PRT_CNT] = { 8, 9, 10, 11, 12, 13 };
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static int phyTab[M88X_PHY_CNT] = { 0, 1, 2, 3, 4 };
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static m88x_regCfg_t prtCfg0[] = {
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{ 4, 0x3e7c, 0x8000 },
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{ 4, 0x3e7c, 0x8003 },
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{ 6, 0x0fc0, 0x001e },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t prtCfg1[] = {
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{ 4, 0x3e7c, 0x8000 },
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{ 4, 0x3e7c, 0x8003 },
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{ 6, 0x0fc0, 0x001d },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t prtCfg2[] = {
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{ 4, 0x3e7c, 0x8000 },
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{ 4, 0x3e7c, 0x8003 },
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{ 6, 0x0fc0, 0x001b },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t prtCfg3[] = {
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{ 4, 0x3e7c, 0x8000 },
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{ 4, 0x3e7c, 0x8003 },
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{ 6, 0x0fc0, 0x0017 },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t prtCfg4[] = {
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{ 4, 0x3e7c, 0x8000 },
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{ 4, 0x3e7c, 0x8003 },
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{ 6, 0x0fc0, 0x000f },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t *prtCfg[M88X_PRT_CNT] = {
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prtCfg0,prtCfg1,prtCfg2,prtCfg3,prtCfg4,NULL
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};
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static m88x_regCfg_t phyCfgX[] = {
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{ 4, 0xfa1f, 0x01e0 },
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{ 0, 0x213f, 0x1200 },
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{ 24, 0x81ff, 0x1200 },
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{ -1, 0xffff, 0x0000 }
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};
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static m88x_regCfg_t *phyCfg[M88X_PHY_CNT] = {
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phyCfgX,phyCfgX,phyCfgX,phyCfgX,NULL
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};
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#if 0
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static void
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m88e6060_dump( int devAddr )
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{
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int i, j;
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unsigned short val[6];
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printf( "M88E6060 Register Dump\n" );
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printf( "====================================\n" );
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printf( "PortNo 0 1 2 3 4 5\n" );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_STAT,&val[i] );
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printf( "STAT %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_ID,&val[i] );
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printf( "ID %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_CNTL,&val[i] );
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printf( "CNTL %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_VLAN,&val[i] );
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printf( "VLAN %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_PAV,&val[i] );
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printf( "PAV %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_RX,&val[i] );
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printf( "RX %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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for (i=0; i<6; i++)
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miiphy_read( devAddr+prtTab[i],M88X_PRT_TX,&val[i] );
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printf( "TX %04hx %04hx %04hx %04hx %04hx %04hx\n",
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val[0],val[1],val[2],val[3],val[4],val[5] );
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printf( "------------------------------------\n" );
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printf( "PhyNo 0 1 2 3 4\n" );
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for (i=0; i<9; i++) {
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for (j=0; j<5; j++) {
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miiphy_read( devAddr+phyTab[j],i,&val[j] );
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}
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printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
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i,val[0],val[1],val[2],val[3],val[4] );
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}
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for (i=0x10; i<0x1d; i++) {
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for (j=0; j<5; j++) {
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miiphy_read( devAddr+phyTab[j],i,&val[j] );
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}
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printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
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i,val[0],val[1],val[2],val[3],val[4] );
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}
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}
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#endif
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int
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m88e6060_initialize( int devAddr )
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{
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static char *_f = "m88e6060_initialize:";
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m88x_regCfg_t *p;
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int err;
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int i;
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unsigned short val;
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/*** reset all phys into powerdown ************************************/
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for (i=0, err=0; i<M88X_PHY_CNT; i++) {
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err += bb_miiphy_read(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,&val );
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/* keep SpeedLSB, Duplex */
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val &= 0x2100;
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/* set SWReset, AnegEn, PwrDwn, RestartAneg */
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val |= 0x9a00;
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err += bb_miiphy_write(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,val );
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}
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if (err) {
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printf( "%s [ERR] reset phys\n",_f );
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return( -1 );
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}
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/*** disable all ports ************************************************/
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for (i=0, err=0; i<M88X_PRT_CNT; i++) {
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err += bb_miiphy_read(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,&val );
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val &= 0xfffc;
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err += bb_miiphy_write(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,val );
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}
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if (err) {
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printf( "%s [ERR] disable ports\n",_f );
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return( -1 );
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}
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/*** initialize switch ************************************************/
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/* set switch mac addr */
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#define ea eth_get_dev()->enetaddr
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val = (ea[4] << 8) | ea[5];
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err = bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC45,val );
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val = (ea[2] << 8) | ea[3];
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err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC23,val );
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val = (ea[0] << 8) | ea[1];
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#undef ea
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val &= 0xfeff; /* clear DiffAddr */
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err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC01,val );
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if (err) {
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printf( "%s [ERR] switch mac address register\n",_f );
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return( -1 );
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}
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/* !DiscardExcessive, MaxFrameSize, CtrMode */
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err = bb_miiphy_read(NULL, devAddr+15,M88X_GLB_CNTL,&val );
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val &= 0xd870;
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val |= 0x0500;
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err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_CNTL,val );
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if (err) {
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printf( "%s [ERR] switch global control register\n",_f );
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return( -1 );
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}
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/* LernDis off, ATUSize 1024, AgeTime 5min */
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err = bb_miiphy_read(NULL, devAddr+15,M88X_ATU_CNTL,&val );
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val &= 0x000f;
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val |= 0x2130;
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err += bb_miiphy_write(NULL, devAddr+15,M88X_ATU_CNTL,val );
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if (err) {
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printf( "%s [ERR] atu control register\n",_f );
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return( -1 );
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}
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/*** initialize ports *************************************************/
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for (i=0; i<M88X_PRT_CNT; i++) {
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if ((p = prtCfg[i]) == NULL) {
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continue;
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}
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while (p->reg != -1) {
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err = 0;
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err += bb_miiphy_read(NULL, devAddr+prtTab[i],p->reg,&val );
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val &= p->msk;
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val |= p->val;
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err += bb_miiphy_write(NULL, devAddr+prtTab[i],p->reg,val );
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if (err) {
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printf( "%s [ERR] config port %d register %d\n",_f,i,p->reg );
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/* XXX what todo */
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}
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p++;
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}
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}
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/*** initialize phys **************************************************/
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for (i=0; i<M88X_PHY_CNT; i++) {
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if ((p = phyCfg[i]) == NULL) {
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continue;
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}
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while (p->reg != -1) {
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err = 0;
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err += bb_miiphy_read(NULL, devAddr+phyTab[i],p->reg,&val );
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val &= p->msk;
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val |= p->val;
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err += bb_miiphy_write(NULL, devAddr+phyTab[i],p->reg,val );
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if (err) {
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printf( "%s [ERR] config phy %d register %d\n",_f,i,p->reg );
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/* XXX what todo */
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}
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p++;
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}
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}
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udelay(100000);
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return( 0 );
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}
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#endif
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