mirror of
https://github.com/AsahiLinux/u-boot
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6bbf5e1a94
Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
84 lines
1.7 KiB
C
84 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <ram.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/bootrom.h>
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#define TIMER_CHN10_BASE 0xff8680a0
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#define TIMER_END_COUNT_L 0x00
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#define TIMER_END_COUNT_H 0x04
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#define TIMER_INIT_COUNT_L 0x10
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#define TIMER_INIT_COUNT_H 0x14
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#define TIMER_CONTROL_REG 0x1c
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#define TIMER_EN 0x1
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#define TIMER_FMODE (0 << 1)
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#define TIMER_RMODE (1 << 1)
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void secure_timer_init(void)
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{
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
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writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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int ret;
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#ifdef CONFIG_DEBUG_UART
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debug_uart_init();
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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printascii("U-Boot TPL board init\n");
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#endif
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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secure_timer_init();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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pr_err("DRAM init failed: %d\n", ret);
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return;
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}
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}
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void board_return_to_bootrom(void)
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{
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back_to_bootrom(BROM_BOOT_NEXTSTAGE);
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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