2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-12-21 10:43:06 +00:00
u-boot/arch/arm/mach-socfpga/include/mach/clock_manager.h
Siew Chin Lim c2b733c0f0 arm: socfpga: Add clock manager for Intel N5X device
Add clock manager for N5X.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-25 13:32:50 +08:00

35 lines
991 B
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
*/
#ifndef _CLOCK_MANAGER_H_
#define _CLOCK_MANAGER_H_
phys_addr_t socfpga_get_clkmgr_addr(void);
#ifndef __ASSEMBLY__
void cm_wait_for_lock(u32 mask);
int cm_wait_for_fsm(void);
void cm_print_clock_quick_summary(void);
unsigned long cm_get_mpu_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
#if defined(CONFIG_TARGET_SOCFPGA_SOC64)
int cm_set_qspi_controller_clk_hz(u32 clk_hz);
#endif
#endif
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#include <asm/arch/clock_manager_gen5.h>
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#include <asm/arch/clock_manager_arria10.h>
#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
#include <asm/arch/clock_manager_s10.h>
#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
#include <asm/arch/clock_manager_agilex.h>
#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
#include <asm/arch/clock_manager_n5x.h>
#endif
#endif /* _CLOCK_MANAGER_H_ */