mirror of
https://github.com/AsahiLinux/u-boot
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25ddd1fb0a
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
221 lines
6.6 KiB
C
221 lines
6.6 KiB
C
/*
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* (C) Copyright 2009 Faraday Technology
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* Po-Yu Chuang <ratbert@faraday-tech.com>
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*
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* Configuation settings for the Faraday A320 board.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/a320.h>
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/*-----------------------------------------------------------------------
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* CPU and Board Configuration Options
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*/
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#undef CONFIG_SKIP_LOWLEVEL_INIT
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/*-----------------------------------------------------------------------
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* Timer
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*/
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#define CONFIG_SYS_HZ 1000 /* timer ticks per second */
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/*-----------------------------------------------------------------------
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* Real Time Clock
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*/
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#define CONFIG_RTC_FTRTC010
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/*-----------------------------------------------------------------------
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* Serial console configuration
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*/
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/* FTUART is a high speed NS 16C550A compatible UART */
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_COM1 0x98200000
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_CLK 18432000
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Ethernet
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*/
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#define CONFIG_NET_MULTI
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#define CONFIG_FTMAC100
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#define CONFIG_BOOTDELAY 3
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/*-----------------------------------------------------------------------
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_PING
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/*-----------------------------------------------------------------------
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "A320 # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* max number of command args */
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#define CONFIG_SYS_MAXARGS 16
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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/*-----------------------------------------------------------------------
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* size in bytes reserved for initial data
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*/
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/*-----------------------------------------------------------------------
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* SDRAM controller configuration
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*/
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#define CONFIG_SYS_FTSDMC020_TP0 (FTSDMC020_TP0_TRAS(2) | \
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FTSDMC020_TP0_TRP(1) | \
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FTSDMC020_TP0_TRCD(1) | \
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FTSDMC020_TP0_TRF(3) | \
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FTSDMC020_TP0_TWR(1) | \
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FTSDMC020_TP0_TCL(2))
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#define CONFIG_SYS_FTSDMC020_TP1 (FTSDMC020_TP1_INI_PREC(4) | \
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FTSDMC020_TP1_INI_REFT(8) | \
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FTSDMC020_TP1_REF_INTV(0x180))
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#define CONFIG_SYS_FTSDMC020_BANK0_BSR (FTSDMC020_BANK_ENABLE | \
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FTSDMC020_BANK_DDW_X16 | \
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FTSDMC020_BANK_DSZ_256M | \
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FTSDMC020_BANK_MBW_32 | \
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FTSDMC020_BANK_SIZE_64M)
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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/*
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* Load address and memory test area should agree with
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* board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself.
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x12000000
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/* memtest works on 63 MB in DRAM */
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x13F00000
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/*-----------------------------------------------------------------------
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* Static memory controller configuration
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*/
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#include <asm/arch/ftsmc020.h>
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#define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \
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FTSMC020_BANK_BASE(PHYS_FLASH_1) | \
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FTSMC020_BANK_SIZE_1M | \
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FTSMC020_BANK_MBW_8)
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#define FTSMC020_BANK0_TIMING (FTSMC020_TPR_RBE | \
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FTSMC020_TPR_AST(3) | \
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FTSMC020_TPR_CTW(3) | \
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FTSMC020_TPR_ATI(0xf) | \
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FTSMC020_TPR_AT2(3) | \
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FTSMC020_TPR_WTC(3) | \
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FTSMC020_TPR_AHT(3) | \
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FTSMC020_TPR_TRNA(0xf))
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#define FTSMC020_BANK1_CONFIG (FTSMC020_BANK_ENABLE | \
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FTSMC020_BANK_BASE(PHYS_FLASH_2) | \
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FTSMC020_BANK_SIZE_32M | \
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FTSMC020_BANK_MBW_32)
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#define FTSMC020_BANK1_TIMING (FTSMC020_TPR_AST(3) | \
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FTSMC020_TPR_CTW(3) | \
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FTSMC020_TPR_ATI(0xf) | \
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FTSMC020_TPR_AT2(3) | \
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FTSMC020_TPR_WTC(3) | \
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FTSMC020_TPR_AHT(3) | \
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FTSMC020_TPR_TRNA(0xf))
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#define CONFIG_SYS_FTSMC020_CONFIGS { \
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{ FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \
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{ FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \
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}
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* use CFI framework */
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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/* support JEDEC */
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#define CONFIG_FLASH_CFI_LEGACY
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#define CONFIG_SYS_FLASH_LEGACY_512Kx8
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#define PHYS_FLASH_1 0x00000000
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#define PHYS_FLASH_2 0x00400000
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2, }
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#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
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/* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_BANKS 2
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/* max number of sectors on one chip */
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#undef CONFIG_SYS_FLASH_EMPTY_INFO
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/* environments */
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR 0x00060000
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#define CONFIG_ENV_SIZE 0x20000
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#endif /* __CONFIG_H */
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