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https://github.com/AsahiLinux/u-boot
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12fc8efe5a
Add Socionext F_SDH30_E51 IP support. The features of this IP includes CMD/DAT line delay and force card insertion mode for non-removable cards. And the IP needs to add some quirks. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
143 lines
3.2 KiB
C
143 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Socionext F_SDH30 eMMC driver
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* Copyright 2021 Linaro Ltd.
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* Copyright 2021 Socionext, Inc.
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <malloc.h>
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#include <sdhci.h>
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#define F_SDH30_ESD_CONTROL 0x124
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#define F_SDH30_CMD_DAT_DELAY BIT(9)
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#define F_SDH30_TEST 0x158
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#define F_SDH30_FORCE_CARD_INSERT BIT(6)
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struct f_sdh30_data {
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void (*init)(struct udevice *dev);
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u32 quirks;
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};
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struct f_sdh30_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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bool enable_cmd_dat_delay;
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const struct f_sdh30_data *data;
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};
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DECLARE_GLOBAL_DATA_PTR;
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static void f_sdh30_e51_init(struct udevice *dev)
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{
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struct f_sdh30_plat *plat = dev_get_plat(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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u32 val;
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val = sdhci_readl(host, F_SDH30_ESD_CONTROL);
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if (plat->enable_cmd_dat_delay)
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val |= F_SDH30_CMD_DAT_DELAY;
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else
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val &= ~F_SDH30_CMD_DAT_DELAY;
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sdhci_writel(host, val, F_SDH30_ESD_CONTROL);
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val = sdhci_readl(host, F_SDH30_TEST);
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if (plat->cfg.host_caps & MMC_CAP_NONREMOVABLE)
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val |= F_SDH30_FORCE_CARD_INSERT;
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else
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val &= ~F_SDH30_FORCE_CARD_INSERT;
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sdhci_writel(host, val, F_SDH30_TEST);
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}
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static int f_sdh30_sdhci_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct f_sdh30_plat *plat = dev_get_plat(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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int ret;
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plat->data = (const struct f_sdh30_data *)dev_get_driver_data(dev);
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ret = mmc_of_parse(dev, &plat->cfg);
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if (ret)
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return ret;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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host->mmc->priv = host;
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if (plat->data && plat->data->quirks)
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host->quirks = plat->data->quirks;
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ret = sdhci_setup_cfg(&plat->cfg, host, 200000000, 400000);
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if (ret)
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return ret;
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upriv->mmc = host->mmc;
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mmc_set_clock(host->mmc, host->mmc->cfg->f_min, MMC_CLK_ENABLE);
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ret = sdhci_probe(dev);
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if (ret)
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return ret;
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if (plat->data && plat->data->init)
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plat->data->init(dev);
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return 0;
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}
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static int f_sdh30_of_to_plat(struct udevice *dev)
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{
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struct sdhci_host *host = dev_get_priv(dev);
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struct f_sdh30_plat *plat = dev_get_plat(dev);
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host->name = strdup(dev->name);
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host->ioaddr = dev_read_addr_ptr(dev);
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host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
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host->index = dev_read_u32_default(dev, "index", 0);
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plat->enable_cmd_dat_delay =
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dev_read_bool(dev, "socionext,enable-cmd-dat-delay");
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return 0;
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}
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static int f_sdh30_bind(struct udevice *dev)
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{
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struct f_sdh30_plat *plat = dev_get_plat(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static const struct f_sdh30_data f_sdh30_e51_data = {
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.init = f_sdh30_e51_init,
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.quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_SUPPORT_SINGLE,
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};
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static const struct udevice_id f_sdh30_mmc_ids[] = {
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{
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.compatible = "fujitsu,mb86s70-sdhci-3.0",
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},
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{
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.compatible = "socionext,f-sdh30-e51-mmc",
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.data = (ulong)&f_sdh30_e51_data,
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},
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{ }
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};
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U_BOOT_DRIVER(f_sdh30_drv) = {
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.name = "f_sdh30_sdhci",
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.id = UCLASS_MMC,
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.of_match = f_sdh30_mmc_ids,
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.of_to_plat = f_sdh30_of_to_plat,
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.ops = &sdhci_ops,
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.bind = f_sdh30_bind,
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.probe = f_sdh30_sdhci_probe,
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.priv_auto = sizeof(struct sdhci_host),
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.plat_auto = sizeof(struct f_sdh30_plat),
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};
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