mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
20e442ab2d
The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
227 lines
5.2 KiB
C
227 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* RGPIO2P driver for the Freescale i.MX7ULP.
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <dm/device-internal.h>
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#include <malloc.h>
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enum imx_rgpio2p_direction {
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IMX_RGPIO2P_DIRECTION_IN,
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IMX_RGPIO2P_DIRECTION_OUT,
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};
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#define GPIO_PER_BANK 32
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struct imx_rgpio2p_data {
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struct gpio_regs *regs;
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};
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struct imx_rgpio2p_plat {
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int bank_index;
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struct gpio_regs *regs;
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};
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static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset)
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{
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u32 val;
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val = readl(®s->gpio_pddr);
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return val & (1 << offset) ? 1 : 0;
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}
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static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int offset,
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enum imx_rgpio2p_direction direction)
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{
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u32 l;
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l = readl(®s->gpio_pddr);
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switch (direction) {
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case IMX_RGPIO2P_DIRECTION_OUT:
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l |= 1 << offset;
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break;
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case IMX_RGPIO2P_DIRECTION_IN:
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l &= ~(1 << offset);
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}
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writel(l, ®s->gpio_pddr);
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}
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static void imx_rgpio2p_bank_set_value(struct gpio_regs *regs, int offset,
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int value)
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{
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if (value)
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writel((1 << offset), ®s->gpio_psor);
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else
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writel((1 << offset), ®s->gpio_pcor);
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}
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static int imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int offset)
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{
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return (readl(®s->gpio_pdir) >> offset) & 0x01;
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}
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static int imx_rgpio2p_direction_input(struct udevice *dev, unsigned offset)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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/* Configure GPIO direction as input. */
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imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_IN);
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return 0;
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}
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static int imx_rgpio2p_direction_output(struct udevice *dev, unsigned offset,
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int value)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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/* Configure GPIO output value. */
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imx_rgpio2p_bank_set_value(bank->regs, offset, value);
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/* Configure GPIO direction as output. */
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imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_OUT);
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return 0;
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}
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static int imx_rgpio2p_get_value(struct udevice *dev, unsigned offset)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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return imx_rgpio2p_bank_get_value(bank->regs, offset);
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}
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static int imx_rgpio2p_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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imx_rgpio2p_bank_set_value(bank->regs, offset, value);
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return 0;
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}
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static int imx_rgpio2p_get_function(struct udevice *dev, unsigned offset)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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/* GPIOF_FUNC is not implemented yet */
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if (imx_rgpio2p_is_output(bank->regs, offset))
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return GPIOF_OUTPUT;
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else
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return GPIOF_INPUT;
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}
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static const struct dm_gpio_ops imx_rgpio2p_ops = {
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.direction_input = imx_rgpio2p_direction_input,
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.direction_output = imx_rgpio2p_direction_output,
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.get_value = imx_rgpio2p_get_value,
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.set_value = imx_rgpio2p_set_value,
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.get_function = imx_rgpio2p_get_function,
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};
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static int imx_rgpio2p_probe(struct udevice *dev)
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{
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struct imx_rgpio2p_data *bank = dev_get_priv(dev);
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struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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int banknum;
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char name[18], *str;
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banknum = plat->bank_index;
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sprintf(name, "GPIO%d_", banknum + 1);
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str = strdup(name);
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if (!str)
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return -ENOMEM;
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uc_priv->bank_name = str;
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uc_priv->gpio_count = GPIO_PER_BANK;
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bank->regs = plat->regs;
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return 0;
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}
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static int imx_rgpio2p_bind(struct udevice *dev)
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{
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struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
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fdt_addr_t addr;
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/*
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* If plat already exsits, directly return.
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* Actually only when DT is not supported, plat
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* is statically initialized in U_BOOT_DRVINFOS.Here
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* will return.
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*/
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if (plat)
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return 0;
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addr = devfdt_get_addr_index(dev, 1);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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/*
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* TODO:
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* When every board is converted to driver model and DT is supported,
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* this can be done by auto-alloc feature, but not using calloc
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* to alloc memory for plat.
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*
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* For example imx_rgpio2p_plat uses platform data rather than device
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* tree.
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*
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* NOTE: DO NOT COPY this code if you are using device tree.
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*/
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plat = calloc(1, sizeof(*plat));
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if (!plat)
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return -ENOMEM;
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plat->regs = (struct gpio_regs *)addr;
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plat->bank_index = dev_seq(dev);
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dev_set_plat(dev, plat);
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return 0;
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}
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static const struct udevice_id imx_rgpio2p_ids[] = {
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{ .compatible = "fsl,imx7ulp-gpio" },
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{ }
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};
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U_BOOT_DRIVER(imx_rgpio2p) = {
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.name = "imx_rgpio2p",
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.id = UCLASS_GPIO,
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.ops = &imx_rgpio2p_ops,
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.probe = imx_rgpio2p_probe,
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.priv_auto = sizeof(struct imx_rgpio2p_plat),
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.of_match = imx_rgpio2p_ids,
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.bind = imx_rgpio2p_bind,
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};
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct imx_rgpio2p_plat imx_plat[] = {
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{ 0, (struct gpio_regs *)RGPIO2P_GPIO1_BASE_ADDR },
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{ 1, (struct gpio_regs *)RGPIO2P_GPIO2_BASE_ADDR },
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{ 2, (struct gpio_regs *)RGPIO2P_GPIO3_BASE_ADDR },
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{ 3, (struct gpio_regs *)RGPIO2P_GPIO4_BASE_ADDR },
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{ 4, (struct gpio_regs *)RGPIO2P_GPIO5_BASE_ADDR },
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{ 5, (struct gpio_regs *)RGPIO2P_GPIO6_BASE_ADDR },
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};
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U_BOOT_DRVINFOS(imx_rgpio2ps) = {
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{ "imx_rgpio2p", &imx_plat[0] },
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{ "imx_rgpio2p", &imx_plat[1] },
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{ "imx_rgpio2p", &imx_plat[2] },
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{ "imx_rgpio2p", &imx_plat[3] },
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{ "imx_rgpio2p", &imx_plat[4] },
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{ "imx_rgpio2p", &imx_plat[5] },
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};
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#endif
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