mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 06:42:56 +00:00
c960c0fd38
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
124 lines
3 KiB
Text
124 lines
3 KiB
Text
CONFIG_ARM=y
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CONFIG_COUNTER_FREQUENCY=25000000
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CONFIG_GIC_V3_ITS=y
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CONFIG_TARGET_LS2080AQDS=y
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CONFIG_TFABOOT=y
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CONFIG_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_LEN=0x0220000
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0x500000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
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CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
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CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
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CONFIG_ENV_ADDR=0x580500000
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CONFIG_PCI=y
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CONFIG_AHCI=y
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CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_FSL_QIXIS=y
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# CONFIG_QIXIS_I2C_ACCESS is not set
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CONFIG_REMAKE_ELF=y
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_MP=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
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CONFIG_RESET_PHY_R=y
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CONFIG_SYS_MAXARGS=64
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CONFIG_SYS_PBSIZE=532
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_DM=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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# CONFIG_ISO_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_OF_LIST="fsl-ls2080a-qds-42-x"
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CONFIG_MULTI_DTB_FIT=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="DPMAC1@xgmii"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_FSL_CAAM=y
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CONFIG_DYNAMIC_DDR_CLK_FREQ=y
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CONFIG_DIMM_SLOTS_PER_CTLR=2
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CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
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CONFIG_DDR_ECC=y
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CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
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CONFIG_SYS_FSL_DDR_INTLV_256B=y
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CONFIG_MPC8XXX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x57
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CONFIG_FSL_ESDHC=y
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CONFIG_ESDHC_DETECT_QUIRK=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_EMPTY_INFO=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_FLASH_QUIET_TEST=y
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CONFIG_SYS_MAX_FLASH_SECT=1024
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CONFIG_SYS_MAX_FLASH_BANKS=2
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_FSL_IFC=y
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CONFIG_SYS_NAND_ONFI_DETECTION=y
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CONFIG_SYS_NAND_MAX_OOBFREE=2
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CONFIG_SYS_NAND_MAX_ECCPOS=256
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_EON=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_PHYLIB=y
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CONFIG_PHYLIB_10G=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_FSL_MEMAC=y
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CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
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CONFIG_DM_MDIO_MUX=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_MDIO_MUX_I2CREG=y
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CONFIG_NVME_PCI=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
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CONFIG_RTC_DS3231=y
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CONFIG_DM_SCSI=y
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CONFIG_SPECIFY_CONSOLE_INDEX=y
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CONFIG_DM_SERIAL=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
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