mirror of
https://github.com/AsahiLinux/u-boot
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21303d1de7
At present this driver calls malloc() to start a new platform data structure, fills it in and tells driver model to use it. We want to avoid malloc, particularly with the new version of of-platdata. Create a new struct which encompasses both the dtd struct and the ns16550 one, to avoid this. Unfortunately we must copy the data into the right place for the ns16550 driver. Add some comments about this. Signed-off-by: Simon Glass <sjg@chromium.org>
142 lines
3.8 KiB
C
142 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Special driver to handle of-platdata
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*
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* Copyright 2019 Google LLC
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*
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* Some code from coreboot lpss.c
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*/
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#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <malloc.h>
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#include <ns16550.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#include <asm/lpss.h>
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#include <dm/device-internal.h>
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#include <asm/arch/uart.h>
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/* Low-power Subsystem (LPSS) clock register */
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enum {
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LPSS_CLOCK_CTL_REG = 0x200,
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LPSS_CNT_CLOCK_EN = 1,
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LPSS_CNT_CLK_UPDATE = 1U << 31,
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LPSS_CLOCK_DIV_N_SHIFT = 16,
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LPSS_CLOCK_DIV_N_MASK = 0x7fff << LPSS_CLOCK_DIV_N_SHIFT,
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LPSS_CLOCK_DIV_M_SHIFT = 1,
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LPSS_CLOCK_DIV_M_MASK = 0x7fff << LPSS_CLOCK_DIV_M_SHIFT,
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/* These set the UART input clock speed */
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LPSS_UART_CLK_M_VAL = 0x25a,
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LPSS_UART_CLK_N_VAL = 0x7fff,
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};
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static void lpss_clk_update(void *regs, u32 clk_m_val, u32 clk_n_val)
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{
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u32 clk_sel;
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clk_sel = clk_n_val << LPSS_CLOCK_DIV_N_SHIFT |
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clk_m_val << LPSS_CLOCK_DIV_M_SHIFT;
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clk_sel |= LPSS_CNT_CLK_UPDATE | LPSS_CNT_CLOCK_EN;
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writel(clk_sel, regs + LPSS_CLOCK_CTL_REG);
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}
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static void uart_lpss_init(void *regs)
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{
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/* Take UART out of reset */
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lpss_reset_release(regs);
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/* Set M and N divisor inputs and enable clock */
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lpss_clk_update(regs, LPSS_UART_CLK_M_VAL, LPSS_UART_CLK_N_VAL);
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}
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void apl_uart_init(pci_dev_t bdf, ulong base)
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{
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/* Set UART base address */
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pci_x86_write_config(bdf, PCI_BASE_ADDRESS_0, base, PCI_SIZE_32);
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/* Enable memory access and bus master */
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pci_x86_write_config(bdf, PCI_COMMAND, PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER, PCI_SIZE_32);
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uart_lpss_init((void *)base);
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}
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/*
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* This driver uses its own compatible string but almost everything else from
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* the standard ns16550 driver. This allows us to provide an of-platdata
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* implementation, since the platdata produced by of-platdata does not match
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* struct apl_ns16550_plat.
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*
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* When running with of-platdata (generally TPL), the platdata is converted to
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* something that ns16550 expects. When running withoutof-platdata (SPL, U-Boot
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* proper), we use ns16550's of_to_plat routine.
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*/
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static int apl_ns16550_probe(struct udevice *dev)
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{
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struct apl_ns16550_plat *plat = dev_get_plat(dev);
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if (!CONFIG_IS_ENABLED(PCI))
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apl_uart_init(plat->ns16550.bdf, plat->ns16550.base);
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return ns16550_serial_probe(dev);
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}
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static int apl_ns16550_of_to_plat(struct udevice *dev)
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{
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct dtd_intel_apl_ns16550 *dtplat;
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struct apl_ns16550_plat *plat = dev_get_plat(dev);
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struct ns16550_plat ns;
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/*
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* The device's plat uses struct apl_ns16550_plat which starts with the
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* dtd struct, but the ns16550 driver expects it to be struct ns16550.
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* Set up what that driver expects. Note that this means that the values
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* cannot be read in this driver when using of-platdata.
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*
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* TODO(sjg@chromium.org): Consider having a separate plat pointer for
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* of-platdata so that it is not necessary to overwrite this.
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*/
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dtplat = &plat->dtplat;
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ns.base = dtplat->early_regs[0];
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ns.reg_width = 1;
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ns.reg_shift = dtplat->reg_shift;
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ns.reg_offset = 0;
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ns.clock = dtplat->clock_frequency;
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ns.fcr = UART_FCR_DEFVAL;
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ns.bdf = pci_ofplat_get_devfn(dtplat->reg[0]);
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memcpy(plat, &ns, sizeof(ns));
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#else
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int ret;
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ret = ns16550_serial_of_to_plat(dev);
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if (ret)
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return ret;
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#endif /* OF_PLATDATA */
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return 0;
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}
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#if !CONFIG_IS_ENABLED(OF_PLATDATA)
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static const struct udevice_id apl_ns16550_serial_ids[] = {
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{ .compatible = "intel,apl-ns16550" },
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{ },
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};
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#endif
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U_BOOT_DRIVER(intel_apl_ns16550) = {
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.name = "intel_apl_ns16550",
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.id = UCLASS_SERIAL,
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.of_match = of_match_ptr(apl_ns16550_serial_ids),
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.plat_auto = sizeof(struct apl_ns16550_plat),
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.priv_auto = sizeof(struct ns16550),
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.ops = &ns16550_serial_ops,
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.of_to_plat = apl_ns16550_of_to_plat,
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.probe = apl_ns16550_probe,
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};
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