mirror of
https://github.com/AsahiLinux/u-boot
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185f812c41
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
866 lines
20 KiB
C
866 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
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*/
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#include <common.h>
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#include <console.h>
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#include <dm.h>
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#include <dfu.h>
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#include <malloc.h>
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#include <serial.h>
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#include <watchdog.h>
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#include <asm/arch/sys_proto.h>
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#include <dm/lists.h>
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#include <dm/device-internal.h>
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#include <linux/delay.h>
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#include <asm/global_data.h>
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#include "stm32prog.h"
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/* - configuration part -----------------------------*/
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#define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
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#define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
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#define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
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/* - Commands -----------------------------*/
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#define GET_CMD_COMMAND 0x00 /* Get CMD command*/
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#define GET_VER_COMMAND 0x01 /* Get Version command*/
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#define GET_ID_COMMAND 0x02 /* Get ID command*/
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#define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
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#define RM_COMMAND 0x11 /* Read Memory command*/
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#define READ_PART_COMMAND 0x12 /* Read Partition command*/
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#define START_COMMAND 0x21 /* START command (Go)*/
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#define DOWNLOAD_COMMAND 0x31 /* Download command*/
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/* existing command for other STM32 but not used */
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/* ERASE 0x43 */
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/* EXTENDED_ERASE 0x44 */
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/* WRITE_UNPROTECTED 0x73 */
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/* READOUT_PROTECT 0x82 */
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/* READOUT_UNPROTECT 0x92 */
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/* - miscellaneous defines ----------------------------------------*/
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#define INIT_BYTE 0x7F /*Init Byte ID*/
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#define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
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#define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
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#define ABORT_BYTE 0x5F /*ABORT*/
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struct udevice *down_serial_dev;
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const u8 cmd_id[] = {
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GET_CMD_COMMAND,
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GET_VER_COMMAND,
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GET_ID_COMMAND,
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GET_PHASE_COMMAND,
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RM_COMMAND,
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READ_PART_COMMAND,
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START_COMMAND,
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DOWNLOAD_COMMAND
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};
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#define NB_CMD sizeof(cmd_id)
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/* with 115200 bauds, 20 ms allow to receive the 256 bytes buffer */
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#define TIMEOUT_SERIAL_BUFFER 30
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/* DFU support for serial *********************************************/
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static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
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{
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int alt_id;
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if (!data->cur_part)
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if (data->phase == PHASE_FLASHLAYOUT)
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alt_id = 0;
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else
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return NULL;
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else
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alt_id = data->cur_part->alt_id;
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return dfu_get_entity(alt_id);
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}
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static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
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u32 buffer_size)
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{
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struct dfu_entity *dfu_entity;
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u8 ret = 0;
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dfu_entity = stm32prog_get_entity(data);
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if (!dfu_entity)
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return -ENODEV;
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ret = dfu_write(dfu_entity,
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buffer,
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buffer_size,
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data->dfu_seq);
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if (ret) {
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stm32prog_err("DFU write failed [%d] cnt: %d",
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ret, data->dfu_seq);
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}
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data->dfu_seq++;
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/* handle rollover as in driver/dfu/dfu.c */
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data->dfu_seq &= 0xffff;
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if (buffer_size == 0)
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data->dfu_seq = 0; /* flush done */
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return ret;
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}
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static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
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u8 *buffer, u32 buffer_size)
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{
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struct dfu_entity *dfu_entity;
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struct stm32prog_part_t *part;
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u32 size;
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int ret, i;
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if (data->dfu_seq) {
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stm32prog_err("DFU write pending for phase %d, seq %d",
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data->phase, data->dfu_seq);
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return -EINVAL;
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}
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if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
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stm32prog_err("read failed : phase %d is invalid", phase);
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return -EINVAL;
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}
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if (data->read_phase <= PHASE_LAST_USER &&
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phase != data->read_phase) {
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/* clear previous read session */
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dfu_entity = dfu_get_entity(data->read_phase - 1);
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if (dfu_entity)
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dfu_transaction_cleanup(dfu_entity);
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}
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dfu_entity = NULL;
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/* found partition for the expected phase */
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for (i = 0; i < data->part_nb; i++) {
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part = &data->part_array[i];
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if (part->id == phase)
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dfu_entity = dfu_get_entity(part->alt_id);
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}
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if (!dfu_entity) {
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stm32prog_err("read failed : phase %d is unknown", phase);
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return -ENODEV;
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}
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/* clear pending read before to force offset */
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if (dfu_entity->inited &&
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(data->read_phase != phase || data->offset != offset))
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dfu_transaction_cleanup(dfu_entity);
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/* initiate before to force offset */
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if (!dfu_entity->inited) {
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ret = dfu_transaction_initiate(dfu_entity, true);
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if (ret < 0) {
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stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
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ret, phase, offset);
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return ret;
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}
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}
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/* force new offset */
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if (dfu_entity->offset != offset)
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dfu_entity->offset = offset;
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data->offset = offset;
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data->read_phase = phase;
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log_debug("\nSTM32 download read %s offset=0x%x\n",
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dfu_entity->name, offset);
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ret = dfu_read(dfu_entity, buffer, buffer_size,
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dfu_entity->i_blk_seq_num);
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if (ret < 0) {
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stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
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ret, phase, offset);
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return ret;
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}
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size = ret;
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if (size < buffer_size) {
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data->offset = 0;
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data->read_phase = PHASE_END;
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memset(buffer + size, 0, buffer_size - size);
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} else {
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data->offset += size;
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}
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return ret;
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}
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/* UART access ***************************************************/
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int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
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{
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struct udevice *dev = NULL;
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struct dm_serial_ops *ops;
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/* no parity, 8 bits, 1 stop */
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u32 serial_config = SERIAL_DEFAULT_CONFIG;
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down_serial_dev = NULL;
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if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
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log_err("serial %d device not found\n", link_dev);
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return -ENODEV;
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}
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down_serial_dev = dev;
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/* force silent console on uart only when used */
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if (gd->cur_serial_dev == down_serial_dev)
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gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
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else
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gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
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ops = serial_get_ops(down_serial_dev);
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if (!ops) {
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log_err("serial %d = %s missing ops\n", link_dev, dev->name);
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return -ENODEV;
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}
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if (!ops->setconfig) {
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log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
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return -ENODEV;
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}
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clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
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data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
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USART_RAM_BUFFER_SIZE);
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return ops->setconfig(down_serial_dev, serial_config);
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}
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static void stm32prog_serial_flush(void)
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{
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struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
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int err;
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do {
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err = ops->getc(down_serial_dev);
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} while (err != -EAGAIN);
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}
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static int stm32prog_serial_getc_err(void)
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{
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struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
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int err;
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do {
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err = ops->getc(down_serial_dev);
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if (err == -EAGAIN) {
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ctrlc();
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WATCHDOG_RESET();
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}
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} while ((err == -EAGAIN) && (!had_ctrlc()));
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return err;
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}
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static u8 stm32prog_serial_getc(void)
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{
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int err;
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err = stm32prog_serial_getc_err();
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return err >= 0 ? err : 0;
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}
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static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
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{
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struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
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int err;
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ulong start = get_timer(0);
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do {
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err = ops->getc(down_serial_dev);
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if (err >= 0) {
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*buffer++ = err;
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*count -= 1;
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} else if (err == -EAGAIN) {
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ctrlc();
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WATCHDOG_RESET();
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if (get_timer(start) > TIMEOUT_SERIAL_BUFFER) {
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err = -ETIMEDOUT;
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break;
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}
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} else {
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break;
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}
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} while (*count && !had_ctrlc());
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return !!(err < 0);
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}
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static void stm32prog_serial_putc(u8 w_byte)
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{
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struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
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int err;
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do {
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err = ops->putc(down_serial_dev, w_byte);
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} while (err == -EAGAIN);
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}
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/* Helper function ************************************************/
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static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
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{
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u8 ret = 0;
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struct dfu_entity *dfu_entity;
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if (address < 0x100) {
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if (address == PHASE_OTP)
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return stm32prog_otp_start(data);
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if (address == PHASE_PMIC)
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return stm32prog_pmic_start(data);
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if (address == PHASE_RESET || address == PHASE_END) {
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data->cur_part = NULL;
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data->dfu_seq = 0;
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data->phase = address;
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return 0;
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}
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if (address != data->phase) {
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stm32prog_err("invalid received phase id %d, current phase is %d",
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(u8)address, (u8)data->phase);
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return -EINVAL;
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}
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}
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/* check the last loaded partition */
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if (address == DEFAULT_ADDRESS || address == data->phase) {
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switch (data->phase) {
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case PHASE_END:
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case PHASE_RESET:
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case PHASE_DO_RESET:
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data->cur_part = NULL;
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data->phase = PHASE_DO_RESET;
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return 0;
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}
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dfu_entity = stm32prog_get_entity(data);
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if (!dfu_entity)
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return -ENODEV;
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ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
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if (ret) {
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stm32prog_err("DFU flush failed [%d]", ret);
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return ret;
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}
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data->dfu_seq = 0;
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printf("\n received length = 0x%x\n", data->cursor);
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/* update DFU with received flashlayout */
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if (data->phase == PHASE_FLASHLAYOUT)
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stm32prog_dfu_init(data);
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} else {
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void (*entry)(void) = (void *)address;
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printf("## Starting application at 0x%x ...\n", address);
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(*entry)();
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printf("## Application terminated\n");
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ret = -ENOEXEC;
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}
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return ret;
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}
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/**
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* get_address() - Get address if it is valid
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*
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* @tmp_xor: Current xor value to update
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* Return: The address area
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*/
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static u32 get_address(u8 *tmp_xor)
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{
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u32 address = 0x0;
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u8 data;
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data = stm32prog_serial_getc();
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*tmp_xor ^= data;
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address |= ((u32)data) << 24;
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data = stm32prog_serial_getc();
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address |= ((u32)data) << 16;
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*tmp_xor ^= data;
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data = stm32prog_serial_getc();
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address |= ((u32)data) << 8;
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*tmp_xor ^= data;
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data = stm32prog_serial_getc();
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address |= ((u32)data);
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*tmp_xor ^= data;
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return address;
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}
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static void stm32prog_serial_result(u8 result)
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{
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/* always flush fifo before to send result */
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stm32prog_serial_flush();
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stm32prog_serial_putc(result);
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}
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/* Command -----------------------------------------------*/
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/**
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* get_cmd_command() - Respond to Get command
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*
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* @data: Current command context
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*/
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static void get_cmd_command(struct stm32prog_data *data)
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{
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u32 counter = 0x0;
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stm32prog_serial_putc(NB_CMD);
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stm32prog_serial_putc(USART_BL_VERSION);
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for (counter = 0; counter < NB_CMD; counter++)
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stm32prog_serial_putc(cmd_id[counter]);
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stm32prog_serial_result(ACK_BYTE);
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}
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/**
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* get_version_command() - Respond to Get Version command
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*
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* @data: Current command context
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*/
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static void get_version_command(struct stm32prog_data *data)
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{
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stm32prog_serial_putc(UBOOT_BL_VERSION);
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stm32prog_serial_result(ACK_BYTE);
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}
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/**
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* get_id_command() - Respond to Get ID command
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*
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* @data: Current command context
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*/
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static void get_id_command(struct stm32prog_data *data)
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{
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u32 cpu = get_cpu_dev();
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/* Send Device IDCode */
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stm32prog_serial_putc(0x1);
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stm32prog_serial_putc((cpu >> 8) & 0xFF);
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stm32prog_serial_putc(cpu & 0xFF);
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stm32prog_serial_result(ACK_BYTE);
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}
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/**
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* get_phase_command() - Respond to Get phase
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*
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* @data: Current command context
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*/
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static void get_phase_command(struct stm32prog_data *data)
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{
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char *err_msg = NULL;
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u8 i, length = 0;
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u32 destination = DEFAULT_ADDRESS; /* destination address */
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int phase = data->phase;
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if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
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err_msg = stm32prog_get_error(data);
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length = strlen(err_msg);
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}
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if (phase == PHASE_FLASHLAYOUT)
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destination = STM32_DDR_BASE;
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stm32prog_serial_putc(length + 5); /* Total length */
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stm32prog_serial_putc(phase & 0xFF); /* partition ID */
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stm32prog_serial_putc(destination); /* byte 1 of address */
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stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
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stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
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stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
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stm32prog_serial_putc(length); /* Information length */
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for (i = 0; i < length; i++)
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stm32prog_serial_putc(err_msg[i]);
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stm32prog_serial_result(ACK_BYTE);
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if (phase == PHASE_RESET)
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stm32prog_do_reset(data);
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}
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/**
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* read_memory_command() - Read data from memory
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*
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* @data: Current command context
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*/
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static void read_memory_command(struct stm32prog_data *data)
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{
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u32 address = 0x0;
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u8 rcv_data = 0x0, tmp_xor = 0x0;
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u32 counter = 0x0;
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/* Read memory address */
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address = get_address(&tmp_xor);
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/* If address memory is not received correctly */
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rcv_data = stm32prog_serial_getc();
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if (rcv_data != tmp_xor) {
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stm32prog_serial_result(NACK_BYTE);
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return;
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}
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stm32prog_serial_result(ACK_BYTE);
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/* Read the number of bytes to be received:
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* Max NbrOfData = Data + 1 = 256
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*/
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rcv_data = stm32prog_serial_getc();
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tmp_xor = ~rcv_data;
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if (stm32prog_serial_getc() != tmp_xor) {
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stm32prog_serial_result(NACK_BYTE);
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return;
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}
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/* If checksum is correct send ACK */
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stm32prog_serial_result(ACK_BYTE);
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/* Send data to the host:
|
|
* Number of data to read = data + 1
|
|
*/
|
|
for (counter = (rcv_data + 1); counter != 0; counter--)
|
|
stm32prog_serial_putc(*(u8 *)(address++));
|
|
}
|
|
|
|
/**
|
|
* start_command() - Respond to start command
|
|
*
|
|
* Jump to user application in RAM or partition check
|
|
*
|
|
* @data: Current command context
|
|
*/
|
|
static void start_command(struct stm32prog_data *data)
|
|
{
|
|
u32 address = 0;
|
|
u8 tmp_xor = 0x0;
|
|
u8 ret, rcv_data;
|
|
|
|
/* Read memory address */
|
|
address = get_address(&tmp_xor);
|
|
|
|
/* If address memory is not received correctly */
|
|
rcv_data = stm32prog_serial_getc();
|
|
if (rcv_data != tmp_xor) {
|
|
stm32prog_serial_result(NACK_BYTE);
|
|
return;
|
|
}
|
|
/* validate partition */
|
|
ret = stm32prog_start(data,
|
|
address);
|
|
|
|
if (ret)
|
|
stm32prog_serial_result(ABORT_BYTE);
|
|
else
|
|
stm32prog_serial_result(ACK_BYTE);
|
|
}
|
|
|
|
/**
|
|
* download_command() - Respond to download command
|
|
*
|
|
* Write data to not volatile memory, Flash
|
|
*
|
|
* @data: Current command context
|
|
*/
|
|
static void download_command(struct stm32prog_data *data)
|
|
{
|
|
u32 address = 0x0;
|
|
u8 my_xor = 0x0;
|
|
u8 rcv_xor;
|
|
u32 counter = 0x0, codesize = 0x0;
|
|
u8 *ramaddress = 0;
|
|
u8 rcv_data = 0x0;
|
|
u32 cursor = data->cursor;
|
|
long size = 0;
|
|
u8 operation;
|
|
u32 packet_number;
|
|
u32 result = ACK_BYTE;
|
|
u8 ret;
|
|
bool error;
|
|
int rcv;
|
|
|
|
address = get_address(&my_xor);
|
|
|
|
/* If address memory is not received correctly */
|
|
rcv_xor = stm32prog_serial_getc();
|
|
if (rcv_xor != my_xor) {
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
|
|
/* If address valid send ACK */
|
|
stm32prog_serial_result(ACK_BYTE);
|
|
|
|
/* get packet number and operation type */
|
|
operation = (u8)((u32)address >> 24);
|
|
packet_number = ((u32)(((u32)address << 8))) >> 8;
|
|
|
|
switch (operation) {
|
|
/* supported operation */
|
|
case PHASE_FLASHLAYOUT:
|
|
case PHASE_OTP:
|
|
case PHASE_PMIC:
|
|
break;
|
|
default:
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
/* check the packet number */
|
|
if (packet_number == 0) {
|
|
/* erase: re-initialize the image_header struct */
|
|
data->packet_number = 0;
|
|
cursor = 0;
|
|
data->cursor = 0;
|
|
/*idx = cursor;*/
|
|
} else {
|
|
data->packet_number++;
|
|
}
|
|
|
|
/* Check with the number of current packet if the device receive
|
|
* the true packet
|
|
*/
|
|
if (packet_number != data->packet_number) {
|
|
data->packet_number--;
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
|
|
/*-- Read number of bytes to be written and data -----------*/
|
|
|
|
/* Read the number of bytes to be written:
|
|
* Max NbrOfData = data + 1 <= 256
|
|
*/
|
|
rcv_data = stm32prog_serial_getc();
|
|
|
|
/* NbrOfData to write = data + 1 */
|
|
codesize = rcv_data + 0x01;
|
|
|
|
if (codesize > USART_RAM_BUFFER_SIZE) {
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
|
|
/* Checksum Initialization */
|
|
my_xor = rcv_data;
|
|
|
|
/* UART receive data and send to Buffer */
|
|
counter = codesize;
|
|
error = stm32prog_serial_get_buffer(data->buffer, &counter);
|
|
|
|
/* read checksum */
|
|
if (!error) {
|
|
rcv = stm32prog_serial_getc_err();
|
|
error = !!(rcv < 0);
|
|
rcv_xor = rcv;
|
|
}
|
|
|
|
if (error) {
|
|
printf("transmission error on packet %d, byte %d\n",
|
|
packet_number, codesize - counter);
|
|
/* waiting end of packet before flush & NACK */
|
|
mdelay(TIMEOUT_SERIAL_BUFFER);
|
|
data->packet_number--;
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
|
|
/* Compute Checksum */
|
|
ramaddress = data->buffer;
|
|
for (counter = codesize; counter != 0; counter--)
|
|
my_xor ^= *(ramaddress++);
|
|
|
|
/* If Checksum is incorrect */
|
|
if (rcv_xor != my_xor) {
|
|
printf("checksum error on packet %d\n",
|
|
packet_number);
|
|
/* wait to be sure that all data are received
|
|
* in the FIFO before flush
|
|
*/
|
|
mdelay(TIMEOUT_SERIAL_BUFFER);
|
|
data->packet_number--;
|
|
result = NACK_BYTE;
|
|
goto end;
|
|
}
|
|
|
|
switch (operation) {
|
|
case PHASE_OTP:
|
|
size = codesize;
|
|
ret = stm32prog_otp_write(data, cursor, data->buffer, &size);
|
|
break;
|
|
|
|
case PHASE_PMIC:
|
|
size = codesize;
|
|
ret = stm32prog_pmic_write(data, cursor, data->buffer, &size);
|
|
break;
|
|
|
|
default:
|
|
ret = stm32prog_write(data, data->buffer, codesize);
|
|
break;
|
|
}
|
|
|
|
if (ret)
|
|
result = ABORT_BYTE;
|
|
else
|
|
/* Update current position in buffer */
|
|
data->cursor += codesize;
|
|
|
|
end:
|
|
stm32prog_serial_result(result);
|
|
}
|
|
|
|
/**
|
|
* read_partition() - Respond to read command
|
|
*
|
|
* Read data from not volatile memory, Flash
|
|
*
|
|
* @data: Current command context
|
|
*/
|
|
static void read_partition_command(struct stm32prog_data *data)
|
|
{
|
|
u32 i, part_id, codesize, offset = 0, rcv_data;
|
|
long size;
|
|
u8 tmp_xor;
|
|
int res;
|
|
u8 buffer[256];
|
|
|
|
part_id = stm32prog_serial_getc();
|
|
tmp_xor = part_id;
|
|
|
|
offset = get_address(&tmp_xor);
|
|
|
|
rcv_data = stm32prog_serial_getc();
|
|
if (rcv_data != tmp_xor) {
|
|
log_debug("1st checksum received = %x, computed %x\n",
|
|
rcv_data, tmp_xor);
|
|
goto error;
|
|
}
|
|
stm32prog_serial_putc(ACK_BYTE);
|
|
|
|
/* NbrOfData to read = data + 1 */
|
|
rcv_data = stm32prog_serial_getc();
|
|
codesize = rcv_data + 0x01;
|
|
tmp_xor = rcv_data;
|
|
|
|
rcv_data = stm32prog_serial_getc();
|
|
if ((rcv_data ^ tmp_xor) != 0xFF) {
|
|
log_debug("2nd checksum received = %x, computed %x\n",
|
|
rcv_data, tmp_xor);
|
|
goto error;
|
|
}
|
|
|
|
log_debug("%s : %x\n", __func__, part_id);
|
|
rcv_data = 0;
|
|
switch (part_id) {
|
|
case PHASE_OTP:
|
|
size = codesize;
|
|
if (!stm32prog_otp_read(data, offset, buffer, &size))
|
|
rcv_data = size;
|
|
break;
|
|
case PHASE_PMIC:
|
|
size = codesize;
|
|
if (!stm32prog_pmic_read(data, offset, buffer, &size))
|
|
rcv_data = size;
|
|
break;
|
|
default:
|
|
res = stm32prog_read(data, part_id, offset,
|
|
buffer, codesize);
|
|
if (res > 0)
|
|
rcv_data = res;
|
|
break;
|
|
}
|
|
if (rcv_data > 0) {
|
|
stm32prog_serial_putc(ACK_BYTE);
|
|
/*----------- Send data to the host -----------*/
|
|
for (i = 0; i < rcv_data; i++)
|
|
stm32prog_serial_putc(buffer[i]);
|
|
/*----------- Send filler to the host -----------*/
|
|
for (; i < codesize; i++)
|
|
stm32prog_serial_putc(0x0);
|
|
return;
|
|
}
|
|
stm32prog_serial_result(ABORT_BYTE);
|
|
return;
|
|
|
|
error:
|
|
stm32prog_serial_result(NACK_BYTE);
|
|
}
|
|
|
|
/* MAIN function = SERIAL LOOP ***********************************************/
|
|
|
|
/**
|
|
* stm32prog_serial_loop() - USART bootloader Loop routine
|
|
*
|
|
* @data: Current command context
|
|
* Return: true if reset is needed after loop
|
|
*/
|
|
bool stm32prog_serial_loop(struct stm32prog_data *data)
|
|
{
|
|
u32 counter = 0x0;
|
|
u8 command = 0x0;
|
|
u8 found;
|
|
int phase = data->phase;
|
|
|
|
/* element of cmd_func need to aligned with cmd_id[]*/
|
|
void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
|
|
/* GET_CMD_COMMAND */ get_cmd_command,
|
|
/* GET_VER_COMMAND */ get_version_command,
|
|
/* GET_ID_COMMAND */ get_id_command,
|
|
/* GET_PHASE_COMMAND */ get_phase_command,
|
|
/* RM_COMMAND */ read_memory_command,
|
|
/* READ_PART_COMMAND */ read_partition_command,
|
|
/* START_COMMAND */ start_command,
|
|
/* DOWNLOAD_COMMAND */ download_command
|
|
};
|
|
|
|
/* flush and NACK pending command received during u-boot init
|
|
* request command reemit
|
|
*/
|
|
stm32prog_serial_result(NACK_BYTE);
|
|
|
|
clear_ctrlc(); /* forget any previous Control C */
|
|
while (!had_ctrlc()) {
|
|
phase = data->phase;
|
|
|
|
if (phase == PHASE_DO_RESET)
|
|
return true;
|
|
|
|
/* Get the user command: read first byte */
|
|
command = stm32prog_serial_getc();
|
|
|
|
if (command == INIT_BYTE) {
|
|
puts("\nConnected\n");
|
|
stm32prog_serial_result(ACK_BYTE);
|
|
continue;
|
|
}
|
|
|
|
found = 0;
|
|
for (counter = 0; counter < NB_CMD; counter++)
|
|
if (cmd_id[counter] == command) {
|
|
found = 1;
|
|
break;
|
|
}
|
|
if (found)
|
|
if ((command ^ stm32prog_serial_getc()) != 0xFF)
|
|
found = 0;
|
|
if (!found) {
|
|
/* wait to be sure that all data are received
|
|
* in the FIFO before flush (CMD and XOR)
|
|
*/
|
|
mdelay(3);
|
|
stm32prog_serial_result(NACK_BYTE);
|
|
} else {
|
|
stm32prog_serial_result(ACK_BYTE);
|
|
cmd_func[counter](data);
|
|
}
|
|
WATCHDOG_RESET();
|
|
}
|
|
|
|
/* clean device */
|
|
if (gd->cur_serial_dev == down_serial_dev) {
|
|
/* restore console on uart */
|
|
gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
|
|
}
|
|
down_serial_dev = NULL;
|
|
|
|
return false; /* no reset after ctrlc */
|
|
}
|