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17bd5cce7e
Having WATCHDOG_RESET() called automatically from the timer interrupt runs counter to the idea of a watchdog device - if the board runs into an infinite loops with interrupts still enabled, the watchdog will never fire. When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more complicated than just poking a few SOC-specific registers - it involves accessing all kinds of global data, and if the interrupt happens at the wrong time (say, in the middle of an WATCHDOG_RESET() call from ordinary code), that can end up corrupting said global data. Allow the board to opt out of calling WATCHDOG_RESET() from the timer interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that setting is currently nonsensical (it would be compile-time divide-by-zero), it cannot affect any existing boards. Add documentation for both the existing and extended meaning of CONFIG_SYS_WATCHDOG_FREQ. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> |
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| .. | ||
| ag101p_timer.c | ||
| altera_timer.c | ||
| andes_plmt_timer.c | ||
| arc_timer.c | ||
| ast_timer.c | ||
| atcpit100_timer.c | ||
| atmel_pit_timer.c | ||
| cadence-ttc.c | ||
| dw-apb-timer.c | ||
| Kconfig | ||
| Makefile | ||
| mchp-pit64b-timer.c | ||
| mpc83xx_timer.c | ||
| mtk_timer.c | ||
| nomadik-mtu-timer.c | ||
| omap-timer.c | ||
| ostm_timer.c | ||
| riscv_timer.c | ||
| rockchip_timer.c | ||
| sandbox_timer.c | ||
| sifive_clint_timer.c | ||
| sti-timer.c | ||
| stm32_timer.c | ||
| timer-uclass.c | ||
| tsc_timer.c | ||