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Ramon Fried 22247c63ac MIPS: add compile time definition of L2 cache size 
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2019-10-25 17:20:43 +02:00
..
arc NET: DW: fix regression for ARC boards 2019-10-07 13:23:49 -04:00
arm Merge branch '2019-10-24-UFS-support' 2019-10-24 09:51:48 -04:00
m68k env: Drop environment.h header file where not needed 2019-08-11 16:43:41 -04:00
microblaze microblaze: Setup initrd_high and fdt_high at run time 2019-10-08 09:55:11 +02:00
mips MIPS: add compile time definition of L2 cache size 2019-10-25 17:20:43 +02:00
nds32 env: Drop environment.h header file where not needed 2019-08-11 16:43:41 -04:00
nios2 .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
powerpc MPC8548: dts: Added PCIe DT node 2019-08-28 13:47:47 +05:30
riscv RISC-V: Align boot image header with Linux 2019-10-18 09:04:19 +08:00
sandbox sandbox: fix build error due to missing struct udevice definition 2019-10-15 08:40:03 -06:00
sh sh: r2dplus: Fix missing PCI range 2019-09-14 21:28:55 +02:00
x86 binman: x86: Separate out 16-bit reset and init code 2019-10-15 08:40:02 -06:00
xtensa env: Move env_get() to env.h 2019-08-11 16:43:41 -04:00
.gitignore
Kconfig sh: r2dplus: Enable OF control 2019-09-02 17:38:43 +02:00