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https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
190 lines
5.7 KiB
C
190 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Pinmux configurations for the DA850 SoCs
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*
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* Copyright (C) 2011 OMICRON electronics GmbH
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*/
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#include <common.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pinmux_defs.h>
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/* SPI pin muxer settings */
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const struct pinmux_config spi0_pins_base[] = {
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{ pinmux(3), 1, 0 }, /* SPI0_CLK */
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{ pinmux(3), 1, 2 }, /* SPI0_SOMI */
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{ pinmux(3), 1, 3 }, /* SPI0_SIMO */
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};
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const struct pinmux_config spi0_pins_scs0[] = {
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{ pinmux(4), 1, 1 }, /* SPI0_SCS[0] */
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};
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const struct pinmux_config spi1_pins_base[] = {
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{ pinmux(5), 1, 2 }, /* SPI1_CLK */
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{ pinmux(5), 1, 4 }, /* SPI1_SOMI */
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{ pinmux(5), 1, 5 }, /* SPI1_SIMO */
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};
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const struct pinmux_config spi1_pins_scs0[] = {
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{ pinmux(5), 1, 1 }, /* SPI1_SCS[0] */
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};
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/* UART pin muxer settings */
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const struct pinmux_config uart0_pins_txrx[] = {
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{ pinmux(3), 2, 4 }, /* UART0_RXD */
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{ pinmux(3), 2, 5 }, /* UART0_TXD */
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};
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const struct pinmux_config uart0_pins_rtscts[] = {
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{ pinmux(3), 2, 6 },
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{ pinmux(3), 2, 7 },
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};
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const struct pinmux_config uart1_pins_txrx[] = {
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{ pinmux(4), 2, 6 }, /* UART1_RXD */
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{ pinmux(4), 2, 7 }, /* UART1_TXD */
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};
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const struct pinmux_config uart2_pins_txrx[] = {
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{ pinmux(4), 2, 4 }, /* UART2_RXD */
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{ pinmux(4), 2, 5 }, /* UART2_TXD */
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};
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const struct pinmux_config uart2_pins_rtscts[] = {
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{ pinmux(0), 4, 6 }, /* UART2_RTS */
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{ pinmux(0), 4, 7 }, /* UART2_CTS */
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};
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/* EMAC pin muxer settings*/
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const struct pinmux_config emac_pins_rmii[] = {
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{ pinmux(14), 8, 2 }, /* RMII_TXD[1] */
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{ pinmux(14), 8, 3 }, /* RMII_TXD[0] */
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{ pinmux(14), 8, 4 }, /* RMII_TXEN */
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{ pinmux(14), 8, 5 }, /* RMII_RXD[1] */
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{ pinmux(14), 8, 6 }, /* RMII_RXD[0] */
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{ pinmux(14), 8, 7 }, /* RMII_RXER */
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{ pinmux(15), 0, 0 }, /* RMII_MHz_50_CLK */
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{ pinmux(15), 8, 1 }, /* RMII_CRS_DV */
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};
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const struct pinmux_config emac_pins_mii[] = {
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{ pinmux(2), 8, 1 }, /* MII_TXEN */
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{ pinmux(2), 8, 2 }, /* MII_TXCLK */
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{ pinmux(2), 8, 3 }, /* MII_COL */
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{ pinmux(2), 8, 4 }, /* MII_TXD[3] */
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{ pinmux(2), 8, 5 }, /* MII_TXD[2] */
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{ pinmux(2), 8, 6 }, /* MII_TXD[1] */
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{ pinmux(2), 8, 7 }, /* MII_TXD[0] */
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{ pinmux(3), 8, 0 }, /* MII_RXCLK */
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{ pinmux(3), 8, 1 }, /* MII_RXDV */
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{ pinmux(3), 8, 2 }, /* MII_RXER */
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{ pinmux(3), 8, 3 }, /* MII_CRS */
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{ pinmux(3), 8, 4 }, /* MII_RXD[3] */
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{ pinmux(3), 8, 5 }, /* MII_RXD[2] */
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{ pinmux(3), 8, 6 }, /* MII_RXD[1] */
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{ pinmux(3), 8, 7 }, /* MII_RXD[0] */
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};
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const struct pinmux_config emac_pins_mdio[] = {
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{ pinmux(4), 8, 0 }, /* MDIO_CLK */
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{ pinmux(4), 8, 1 }, /* MDIO_D */
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};
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/* I2C pin muxer settings */
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const struct pinmux_config i2c0_pins[] = {
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{ pinmux(4), 2, 2 }, /* I2C0_SCL */
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{ pinmux(4), 2, 3 }, /* I2C0_SDA */
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};
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const struct pinmux_config i2c1_pins[] = {
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{ pinmux(4), 4, 4 }, /* I2C1_SCL */
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{ pinmux(4), 4, 5 }, /* I2C1_SDA */
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};
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/* EMIFA pin muxer settings */
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const struct pinmux_config emifa_pins_cs2[] = {
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{ pinmux(7), 1, 0 }, /* EMA_CS2 */
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};
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const struct pinmux_config emifa_pins_cs3[] = {
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{ pinmux(7), 1, 1 }, /* EMA_CS[3] */
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};
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const struct pinmux_config emifa_pins_cs4[] = {
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{ pinmux(7), 1, 2 }, /* EMA_CS[4] */
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};
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const struct pinmux_config emifa_pins_nand[] = {
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{ pinmux(7), 1, 4 }, /* EMA_WE */
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{ pinmux(7), 1, 5 }, /* EMA_OE */
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{ pinmux(9), 1, 0 }, /* EMA_D[7] */
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{ pinmux(9), 1, 1 }, /* EMA_D[6] */
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{ pinmux(9), 1, 2 }, /* EMA_D[5] */
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{ pinmux(9), 1, 3 }, /* EMA_D[4] */
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{ pinmux(9), 1, 4 }, /* EMA_D[3] */
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{ pinmux(9), 1, 5 }, /* EMA_D[2] */
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{ pinmux(9), 1, 6 }, /* EMA_D[1] */
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{ pinmux(9), 1, 7 }, /* EMA_D[0] */
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{ pinmux(12), 1, 5 }, /* EMA_A[2] */
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{ pinmux(12), 1, 6 }, /* EMA_A[1] */
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};
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/* NOR pin muxer settings */
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const struct pinmux_config emifa_pins_nor[] = {
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{ pinmux(5), 1, 6 }, /* EMA_BA[1] */
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{ pinmux(6), 1, 6 }, /* EMA_WAIT[1] */
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{ pinmux(7), 1, 4 }, /* EMA_WE */
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{ pinmux(7), 1, 5 }, /* EMA_OE */
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{ pinmux(8), 1, 0 }, /* EMA_D[15] */
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{ pinmux(8), 1, 1 }, /* EMA_D[14] */
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{ pinmux(8), 1, 2 }, /* EMA_D[13] */
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{ pinmux(8), 1, 3 }, /* EMA_D[12] */
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{ pinmux(8), 1, 4 }, /* EMA_D[11] */
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{ pinmux(8), 1, 5 }, /* EMA_D[10] */
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{ pinmux(8), 1, 6 }, /* EMA_D[9] */
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{ pinmux(8), 1, 7 }, /* EMA_D[8] */
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{ pinmux(9), 1, 0 }, /* EMA_D[7] */
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{ pinmux(9), 1, 1 }, /* EMA_D[6] */
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{ pinmux(9), 1, 2 }, /* EMA_D[5] */
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{ pinmux(9), 1, 3 }, /* EMA_D[4] */
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{ pinmux(9), 1, 4 }, /* EMA_D[3] */
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{ pinmux(9), 1, 5 }, /* EMA_D[2] */
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{ pinmux(9), 1, 6 }, /* EMA_D[1] */
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{ pinmux(9), 1, 7 }, /* EMA_D[0] */
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{ pinmux(10), 1, 1 }, /* EMA_A[22] */
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{ pinmux(10), 1, 2 }, /* EMA_A[21] */
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{ pinmux(10), 1, 3 }, /* EMA_A[20] */
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{ pinmux(10), 1, 4 }, /* EMA_A[19] */
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{ pinmux(10), 1, 5 }, /* EMA_A[18] */
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{ pinmux(10), 1, 6 }, /* EMA_A[17] */
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{ pinmux(10), 1, 7 }, /* EMA_A[16] */
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{ pinmux(11), 1, 0 }, /* EMA_A[15] */
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{ pinmux(11), 1, 1 }, /* EMA_A[14] */
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{ pinmux(11), 1, 2 }, /* EMA_A[13] */
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{ pinmux(11), 1, 3 }, /* EMA_A[12] */
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{ pinmux(11), 1, 4 }, /* EMA_A[11] */
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{ pinmux(11), 1, 5 }, /* EMA_A[10] */
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{ pinmux(11), 1, 6 }, /* EMA_A[9] */
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{ pinmux(11), 1, 7 }, /* EMA_A[8] */
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{ pinmux(12), 1, 0 }, /* EMA_A[7] */
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{ pinmux(12), 1, 1 }, /* EMA_A[6] */
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{ pinmux(12), 1, 2 }, /* EMA_A[5] */
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{ pinmux(12), 1, 3 }, /* EMA_A[4] */
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{ pinmux(12), 1, 4 }, /* EMA_A[3] */
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{ pinmux(12), 1, 5 }, /* EMA_A[2] */
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{ pinmux(12), 1, 6 }, /* EMA_A[1] */
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{ pinmux(12), 1, 7 }, /* EMA_A[0] */
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};
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/* MMC0 pin muxer settings */
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const struct pinmux_config mmc0_pins[] = {
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{ pinmux(10), 2, 0 }, /* MMCSD0_CLK */
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{ pinmux(10), 2, 1 }, /* MMCSD0_CMD */
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{ pinmux(10), 2, 2 }, /* MMCSD0_DAT_0 */
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{ pinmux(10), 2, 3 }, /* MMCSD0_DAT_1 */
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{ pinmux(10), 2, 4 }, /* MMCSD0_DAT_2 */
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{ pinmux(10), 2, 5 }, /* MMCSD0_DAT_3 */
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/* DA850 supports only 4-bit mode, remaining pins are not configured */
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};
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