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https://github.com/AsahiLinux/u-boot
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3cd06bfa96
Add the required pinctrl, gpio and phy properties required by the USB DT nodes of the sama7g5ek boards. Since these have not yet been defined in upstream Linux, place them in the U-Boot specific DT file. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
170 lines
3.1 KiB
Text
170 lines
3.1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* at91-sama7g5ek-u-boot.dtsi - Device Tree file for SAMA7G5 SoC u-boot
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* properties.
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*
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Eugen Hristev <eugen.hristev@microchip.com>
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* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
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*
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*/
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#include "sama7g5-pinfunc.h"
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#include <dt-bindings/reset/sama7g5-reset.h>
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#include <dt-bindings/clock/at91.h>
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/ {
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chosen {
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u-boot,dm-pre-reloc;
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};
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utmi {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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usb_phy0: phy@0 {
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compatible = "microchip,sama7g5-usb-phy";
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sfr-phandle = <&sfr>;
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reg = <0>;
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clocks = <&utmi_clk USB_UTMI1>;
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clock-names = "utmi_clk";
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status = "disabled";
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#phy-cells = <0>;
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};
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usb_phy1: phy@1 {
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compatible = "microchip,sama7g5-usb-phy";
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sfr-phandle = <&sfr>;
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reg = <1>;
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clocks = <&utmi_clk USB_UTMI2>;
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clock-names = "utmi_clk";
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status = "disabled";
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#phy-cells = <0>;
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};
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usb_phy2: phy@2 {
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compatible = "microchip,sama7g5-usb-phy";
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sfr-phandle = <&sfr>;
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reg = <2>;
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clocks = <&utmi_clk USB_UTMI3>;
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clock-names = "utmi_clk";
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status = "disabled";
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#phy-cells = <0>;
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};
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};
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utmi_clk: utmi-clk {
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compatible = "microchip,sama7g5-utmi-clk";
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sfr-phandle = <&sfr>;
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#clock-cells = <1>;
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clocks = <&pmc PMC_TYPE_CORE 27>;
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clock-names = "utmi_clk";
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resets = <&reset_controller SAMA7G5_RESET_USB_PHY1>,
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<&reset_controller SAMA7G5_RESET_USB_PHY2>,
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<&reset_controller SAMA7G5_RESET_USB_PHY3>;
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reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
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};
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soc {
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u-boot,dm-pre-reloc;
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usb2: usb@400000 {
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compatible = "microchip,sama7g5-ohci", "usb-ohci";
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reg = <0x00400000 0x100000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 106>, <&utmi_clk USB_UTMI1>, <&usb_clk>;
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clock-names = "ohci_clk", "hclk", "uhpck";
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status = "disabled";
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};
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usb3: usb@500000 {
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compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
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reg = <0x00500000 0x100000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usb_clk>, <&pmc PMC_TYPE_PERIPHERAL 106>;
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clock-names = "usb_clk", "ehci_clk";
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status = "disabled";
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};
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sfr: sfr@e1624000 {
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compatible = "microchip,sama7g5-sfr", "syscon";
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reg = <0xe1624000 0x4000>;
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};
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};
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};
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&main_rc {
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u-boot,dm-pre-reloc;
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};
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&main_xtal {
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u-boot,dm-pre-reloc;
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};
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&pioA {
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u-boot,dm-pre-reloc;
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};
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&pinctrl_flx3_default {
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u-boot,dm-pre-reloc;
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};
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&pioA {
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u-boot,dm-pre-reloc;
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pinctrl_usb_default: usb_default {
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pinmux = <PIN_PC6__GPIO>;
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bias-disable;
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};
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};
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&pit64b0 {
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u-boot,dm-pre-reloc;
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};
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&pmc {
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u-boot,dm-pre-reloc;
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};
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&slow_rc_osc {
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u-boot,dm-pre-reloc;
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};
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&slow_xtal {
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u-boot,dm-pre-reloc;
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};
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&uart3 {
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u-boot,dm-pre-reloc;
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};
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&usb2 {
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num-ports = <3>;
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atmel,vbus-gpio = <0
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0
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&pioA PIN_PC6 GPIO_ACTIVE_HIGH
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>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_default>;
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phys = <&usb_phy2>;
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phy-names = "usb";
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&usb_phy0 {
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status = "okay";
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};
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&usb_phy1 {
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status = "okay";
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};
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&usb_phy2 {
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status = "okay";
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};
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